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5.5.5
Symmetric multiprocessing and synchronization
The SLES kernel allows multiple processes to execute in the kernel simultaneously (the kernel is reentrant).
It also supports symmetric multiprocessing (SMP), in which two or more processors share the same memory
and have equal access to I/O devices. Because of re-entrancy and SMP synchronization, issues arises. This
section describes various synchronization techniques used by the SLES kernel.
A kernel control path denotes the sequence of instructions executed by the kernel to handle a system call, an
exception, or an interrupt. If a kernel control path is suspended while acting on a kernel data structure, no
other kernel control path should be allowed to act on the same data structure. A critical region is any section
of code that must be completely executed by any kernel control path that enters it before another kernel
control path can enter it. A critical region could be as small as code to update a global variable, or larger
multi-instruction code to remove an element from a linked list. Depending on the size of, or the type of,
operation performed by a critical region, the SLES kernel uses the following methods to implement
synchronization.
5.5.5.1
Atomic operations
Operations that are completed without any interruption are called atomic operations. They constitute one of
the synchronization techniques of Linux, and operate at the chip level. The operation is executed in a single
instruction without being interrupted in the middle and avoids accesses to the same memory location by other
CPUs. The SLES kernel provides a special atomic_t data type and special functions that act on
atomic_t variables.
The compiler for the System x processor generates assembly language code with a special lock byte (0xf0)
around instructions involving atomic_t type variables and functions. When executing these assembly
instructions, the presence of the lock byte causes the control unit to lock the memory bus, preventing other
processors from accessing the same memory location.
5.5.5.2
Memory barriers
Compilers and assemblers reorder instructions to optimize code. A memory barrier ensures that all
instructions before the memory barrier are completed, before starting the instructions after the memory
barrier. This is to ensure that compilers do not reorder instructions when dealing with critical sections. All
synchronization primitives act as memory barriers (firewall).
The eServer series processors provide the following kinds of assembly language instructions that act as
memory barriers:
Instructions that operate on I/O ports.
•
Instructions prefixed by a lock byte.
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Instructions that write into control registers, system registers, or debug registers.
•
Special assembly languages instructions. An example is iret.
•
Memory barrier primitives, such as mb(), rmb(), and wmb(), which provide memory barriers,
•
read memory barriers, and write memory barriers, respectively, for multiprocessor or uniprocessor
systems.
Memory barrier primitives, such as smp_mb(), smp_rmb(), and smp_wmb(), which provide
•
memory barriers, read memory barriers, and write memory barriers, respectively, for multiprocessor
systems only.
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