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HP E1459A 64-Channel Isolated Input Interrupt Module
Warranty ....................................................................................................................... 5
Safety Symbols ............................................................................................................. 6
WARNINGS................................................................................................................. 6
Declaration of Conformity ............................................................................................ 7
Reader Comment Sheet ................................................................................................ 9
Chapter 1
Installing and Configuring the HP E1459A .............................................................. 11
Functional Description................................................................................................ 11
Watchdog Timer .................................................................................................. 14
Input Level Selection .......................................................................................... 14
Input Isolation ..................................................................................................... 14
Input Debounce Processing ................................................................................. 14
Input Edge Detection ........................................................................................... 15
Input Data Capture .............................................................................................. 17
Front Panel Markers ............................................................................................ 18
Interrupt Driven or Polled Mode Operations ...................................................... 18
Interrupt Parsing .................................................................................................. 18
Configuring for Installation ........................................................................................ 19
Setting the Logical Address ................................................................................ 20
Setting the Interrupt Priority ............................................................................... 20
Setting Input Threshold Levels ........................................................................... 21
Setting the Reset Time on the Watchdog Timer ................................................. 21
Connecting User Inputs ....................................................................................... 22
Installing the HP E1459A in a VXIbus Mainframe ............................................ 24
Terminal Block .................................................................................................... 25
Wiring a Terminal Block ..................................................................................... 26
Chapter 2
Using the HP E1459A Module .................................................................................... 29
Power-on / Reset States .............................................................................................. 30
Example 1: Reset, Self Test, and Module ID ...................................................... 30
Example 2: Digital Input ..................................................................................... 32
Edge Detected Event Detection .................................................................................. 34
Example 3: Edge Interrupt .................................................................................. 37
Contents
Edition 3
Contents
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Summary of Contents for HP E1459A
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Page 1: Table Of Contents
Setting Input Threshold Levels ... 21 Setting the Reset Time on the Watchdog Timer ... 21 Connecting User Inputs ... 22 Installing the HP E1459A in a VXIbus Mainframe ... 24 Terminal Block ... 25 Wiring a Terminal Block ... 26 Chapter 2 Using the HP E1459A Module ... - Page 2 Chapter 3 HP E1459A SCPI Command Reference ... 39 DIAGnostic:SYSReset Subsystem ... 41 DIAGnostic:SYSReset[:STATe]? ... 41 DIAGnostic:SYSReset:ENABle <state> ... 41 DIAGnostic:SYSReset:ENABle? ... 42 DISPlay:MONitor Subsystem... 43 DISPlay:MONitor:PORT <port> ... 43 DISPlay:MONitor:PORT? [MINimum | MAXimum | DEFault] ... 44 DISPlay:MONitor:PORT:AUTO <state> ... 44 DISPlay:MONitor:PORT:AUTO? ...
- Page 3 Command Quick Reference... 71 Appendix A HP E1459A Specifications ... 73 Appendix B HP E1459A Register Definitions ... 75 Overview... 75 Addressing the Registers ... 76 Register Access with Logical Address ... 76 Register Access with Memory Mapping ... 76 Register Definitions ...
- Page 4 Contents...
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Page 5: Warranty
This Hewlett-Packard product is warranted against defects in materials and workmanship for a period of three years from date of shipment. Duration and conditions of warranty for this product may be superseded when the product is integrated into (becomes a part of) other HP products. -
Page 6: Safety Symbols
Edition 2 (as HP Z2404-90001)......February 1996 Edition 3 (HP E1459-90001) ....... . . July 1997... -
Page 7: Declaration Of Conformity
Supplementary Information: The product herewith complies with the requirements of the Low Voltage Directive 73/23/EEC and the EMC Directive 89/336/EEC (inclusive 93/68/EEC) and carries the "CE" mark accordingly. Tested in a typical configuration in an HP C-Size VXI mainframe. April, 1996 European contact: Your local Hewlett-Packard Sales and Service Office or Hewlett-Packard GmbH, Depart- ment HQ-TRE, Herrenberger Straße 130, D-71034 Böblingen, Germany (FAX +49-7031-14-3143) - Page 8 Notes:...
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Page 9: Reader Comment Sheet
HP E1459A / Z2404B 64-Channel Isolated Input / Interrupt Module User’s Manual You can help us improve our manuals by sharing your comments and suggestions. In appreciation of your time, we will enter you in a quarterly drawing for a Hewlett-Packard Palmtop Personal Computer (U.S. government employees are not eligible for the drawing). -
Page 11: Installing And Configuring The Hp E1459A
Figure 1-1 shows the functional block diagram for the module. 1. The HP E1459A and Z2404B are functionally identical. The HP E1459A is provided with a downloadable SCPI driver and a VXIplug&play driver; the HP Z2404B was not provided with a language driver. - Page 12 To VXIbus Transceivers Figure 1-1. HP E1459A 64-Channel Isolated Digital Input/Interrupt Block Diagram 12 Installing and Configuring the HP E1459A...
- Page 13 The HP E1459A can be programmed to monitor channel occurrences either internally with a 1.0 MHz sample clock, or externally, with a sourced capture clock. Using either clocking technique, data channels may function as edge detect inputs and/or data capture inputs.
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Page 14: Watchdog Timer
Watchdog Timer The HP E1459A provides a programmable timer facility which, in the event of time-out, will generate a "system wide" reset to all other card-cage modules. This timer may be disabled by the SCPI command DIAG:SYSR:ENAB OFF. Input Level Each channel is capable of operation over an input range from 2.0 through... -
Page 15: Input Edge Detection
The control logic detects this "cleared marker condition" and consequently clears the pending service request flip-flop. External edge events which occur concurrently with a register read/clear cycle are queued and post-processed on completion of the cycle. Installing and Configuring the HP E1459A... -
Page 16: Edge Detection
DAV (Data AVailable) situation. The second DAV is retained (and valid) until a subsequent read of the corresponding data register. Figure 1-4. DAV Timing 16 Installing and Configuring the HP E1459A... -
Page 17: Input Data Capture
(16 MHz) period before again being posted to the control FPGA. In the "Data Capture Mode", the HP E1459A may be programmed to generate an interrupt on the occurrence of an external capture clock, or an internal 1.0 MHz sample clock may be selected to allow the state of the data... -
Page 18: Front Panel Markers
18 Installing and Configuring the HP E1459A All "Data Available" and "Edge Detect" marker bits are physically available via the HP E1459A front panel. These outputs are TTL/HC compatible and may be used to trigger other system-wide events or to provide logging information for statistical tracking or other performance analysis purposes. -
Page 19: Configuring For Installation
STATIC-SENSITIVE DEVICE. Use anti-static procedures when removing, configuring, and installing a module. The module is susceptible to static discharges. Do not install the module without its metal shield attached. Installing and Configuring the HP E1459A... -
Page 20: Setting The Logical Address
Consult your mainframe manual to be sure that backplane jumpers are configured correctly. If you are using the HP E1401B Mainframe these jumpers are automatically set when the card is installed. Figure 1-5. HP E1459A Logical Address Switch and IRQ Jumper Locations 20 Installing and Configuring the HP E1459A... -
Page 21: Setting Input Threshold Levels
O indicates the jumper is removed. The factory default setting is 1.2 second. Jumper 600 ms JM202 JM203 Installing and Configuring the HP E1459A 12 Volt 24 Volt 48 Volt 5 Volt Settings (Factory Default) -
Page 22: Connecting User Inputs
Port 22 Installing and Configuring the HP E1459A The HP E1459A Isolated Digital Input/Interrupt module consists of a component module and a terminal block. User inputs for each channel consists of a low and a high connection for each channel. The inputs will only detect signals of a positive polarity. - Page 23 Figure 1-7. Front Panel Connections Installing and Configuring the HP E1459A CH 00 HI CH 00 LO CH 01 HI CH 02 LO CH 01 LO CH 02 HI CH 03 LO CH 04 HI CH 03 HI CH 04 LO...
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Page 24: Installing The Hp E1459A In A Vxibus Mainframe
Figure 1-8. Installing the HP E1459A in a VXIbus Mainframe WARNING 24 Installing and Configuring the HP E1459A The HP E1459A may be installed in any C-size VXIbus mainframe slot (except slot 0). Refer to Figure 1-8 to install the module in a mainframe. Slide the... -
Page 25: Terminal Block
Terminal Block The HP E1459A includes both the input / interrupt module and a screw-type standard terminal block. User inputs to the terminal block are to the High and Low for each channel, +5Volt, Ground, Data Valid (DAV0 - DAV3), External Trigger (XTRIG0 - XTRIG3), and Interrupt (INTR0 - INTR3) . -
Page 26: Wiring A Terminal Block
Wiring a Terminal The following illustrations show how to connect field wiring to the terminal block. Block Continued on Next Page 26 Installing and Configuring the HP E1459A... - Page 27 Replace Clear Cover A. Hook in the top cover tabs onto the fixture B. Press down and tighten screws Push in the Extraction Levers to Lock the Terminal Module onto the HP E1459A Extraction Levers Installing and Configuring the HP E1459A...
- Page 28 28 Installing and Configuring the HP E1459A...
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Page 29: Using The Hp E1459A Module
Microsoft Visual C++ but should compile under any standard ANSI C compiler. To run the programs you must have the HP SICL Library, the HP VISA extensions, and an HP 82340 or 82341 HP-IB module installed and properly configured in your PC. An HP E1406 Command Module provides direct access to the VXI backplane. -
Page 30: Power-On / Reset States
Power-on / Reset States Example 1: Reset, Self Test, and Module ID 30 Using the HP E1459A Module At power-on or reset (*RST) the HP E1459A is set to the following conditions: • Watchdog timer is off (disabled). • Clock Source is Internal •... - Page 31 /* Close Sessions */ errStatus = viClose (E1459); if (VI_SUCCESS > errStatus){ printf("ERROR: viClose() returned 0x%x\n",errStatus); return 0;} errStatusviClose (viRM); if (VI_SUCCESS > errStatus){ printf("ERROR: viClose() returned 0x%x\n",errStatus); return 0;} /* End of main program */ Using the HP E1459A Module...
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Page 32: Example 2: Digital Input
Digital Input 32 Using the HP E1459A Module The HP E1459A is capable of simple digital inputs on any of the individual four ports or combined Ports 0 and 1 or Ports 2 and 3. The command subsystem (see Chapter 3 for details) provides two commands for... - Page 33 /* Close Sessions */ errStatus = viClose (E1459); if (VI_SUCCESS > errStatus){ printf("ERROR: viClose() returned 0x%x\n",errStatus); return 0;} errStatus = viClose (viRM); if (VI_SUCCESS > errStatus){ printf("ERROR: viClose() returned 0x%x\n",errStatus); return 0;} /* End of main program */ Using the HP E1459A Module...
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Page 34: Edge Detected Event Detection
7 becomes set. STB? The third method is to set-up the Status Subsystem and have the HP E1459A Module interrupt (via SRQ) the system computer when an event occurs. In general, you must set-up the port summary enable register to specify the type of event(s) and port(s) to monitor;... - Page 35 1. Poll the Port Summary Register 2. Poll the Status Subsystem 3. Use SRQ to interrupt Read the data and clear the event detector register Figure 2-1. HP E1459A Edge Event Detection Flowchart [SENSe:]EVENt:PORT n :EDGE:ENABle < state > [SENSe:]EVENt:PSUMmary:EDGe? STATus:OPERation:PSUMmary:CONDition? STATus:OPERation:PSUMmary:ENABle < mask >...
- Page 36 2. Poll the Status Subsystem 3. Use SRQ to interrupt Read the data and clear the event detector register Figure 2-2. HP E1459A Data Available Event Detection Flowchart 36 Using the HP E1459A Module INPut n :CLOCk[:SOURce]EXT INPut n :DEBounce:TIMe < time >...
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Page 37: Example 3: Edge Interrupt
The program then read the PEDGE and NEDGE registers and returns the current value. Created in Microsoft Visual C++ */ #include <visa.h> #include <stdio.h> #include <stdlib.h> #define INSTR_ADDR "GPIB0::9::3::INSTR" /* HP E1459A logical address */ int main() ViStatus errStatus; ViSession viRM; ViSession E1459; int val, event;... - Page 38 38 Using the HP E1459A Module if (VI_SUCCESS > errStatus){ printf("ERROR: viPrintf() returned 0x%x\n",errStatus); return errStatus;} /* Enable Port 0 Edge Detection */ errStatus = viPrintf (E1459, "EVEN:PORT0:EDGE:ENAB ON\n"); if (VI_SUCCESS > errStatus){ printf("ERROR: viPrintf() returned 0x%x\n",errStatus); return errStatus;} /* Loop and poll Port Summary Register until event occurs */ while (event = 0) errStatus = viQueryf (E1459, "EVEN:PSUM:EDGE?\n","%t",event);...
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Page 39: Hp E1459A Scpi Command Reference
SCPI driver for the HP Command Modules such as the HP E1406. If you are not using a command module, you should use the HP VXIplug&play driver. This driver is available on the HP Instrument Drivers CD and available on the World Wide Web. -
Page 40: Command Parameters
Commands *RST;DISP:MON ON or DISP:MON ON;*TRG Linking Multiple SCPI Commands. Use both a semicolon and a colon between the commands. For example: DISP:MON:PORT 0;:MEAS:DIG:DATA0:WORD::VAL? 40 HP E1459A SCPI Command Reference DISPlay are all acceptable. DISPlay:MONitor:STATe <state> Explanations and Example Accepts all commonly used decimal representations of number including optional signs, decimal points, and scientific notation. -
Page 41: Diagnostic:sysreset Subsystem
DIAG:SYSR:STAT? command. Example DIAG:SYSR:ENAB ON DIAGnostic:SYSReset Subsystem [:STATe]? :ENABle <state> :ENABle? Parameter Type Range of Values numeric or discrete 0, 1, OFF, ON Turns Watchdog Timer on HP E1459A SCPI Command Reference page 41 page 41 page 42 Default 0, OFF... -
Page 42: Diagnostic:sysreset:enable
Returns the state of the Watchdog Timer as either a (unsigned) 1, or 0. Parameters None Comments Returns a 1 if the Watchdog Timer is enabled. Returns a 0 if the Timer is not enabled. 42 HP E1459A SCPI Command Reference... -
Page 43: Display:monitor Subsystem
*RST Condition: sets the display Port to 0 and the automatic display mode Example DISP:MON:PORT2 DISP:MON:PORT AUTO 1.The display monitor is an RS-232 Terminal attached to an HP E1405B, E1406, or E1306 Command Module and provides an interactive user interface to the HP E1459A. DISPlay:MONitor Subsystem :PORT < port >... -
Page 44: Display:monitor:port? [Minimum | Maximum | Default]
A 0 indicates the automatic display mode is OFF; a 1 indicates the automatic display mode is ON. • *RST Condition: sets the automatic mode on. 44 HP E1459A SCPI Command Reference Parameter Type Range of Values numeric or discrete... -
Page 45: Display:monitor[:State]
Parameter Type Range of Values Numeric or discrete 0 | 1 | OFF | ON turns the display mode on. returns a 1 if the monitor mode is on; or returns a 0 if the HP E1459A SCPI Command Reference Default... -
Page 46: Input Subsystem
• *RST Condition: sets the input clock source to INTernal. Example INP1:CLOC:SOUR EXT 46 HP E1459A SCPI Command Reference :CLOCk[:SOURce] < source > :CLOCk[:SOURce]? :DEBounce:TIME < time > | MINimum | MAXimum | DEFault page 47 :DEBounce:TIME? [MINimum | MAXimum | DEFault]... -
Page 47: Inputn:clock[:Source]
Parameter Type Range of Values numeric numeric (floating pt) 18.0 Sec through 9600 Sec Default 18.0 Sec Minimum 18.0 Sec Maximum 9600 Sec HP E1459A SCPI Command Reference Default 0, 1, 2, 3 Default 0, 1, 2, 3 18.0 Sec... -
Page 48: Inputn:debounce:time? [Minimum | Maximum | Default]
0 and 1; for n = 2 or n = 3, this command returns the debounce time for both Ports both Ports 2 and 3. Example INP2:DEB:TIME? 48 HP E1459A SCPI Command Reference Parameter Type Range of Values numeric numeric (floating pt) 18.0 sec through 9600 sec... -
Page 49: Measure Subsystem
The MEASure commands are used for the Isolated Digital Input part of the HP E1459A. These commands return data corresponding to the current value of the input signals. Refer to Chapter 2 for more examples of using the MEASure Subsystem. -
Page 50: Measure:digital:datan[:Type]:Bitm
Chapter 2 for more details. • *RST Condition: sets the input clock source to INTernal and the debounce time to 18.0 S. Example MEAS:DIG:DATA3:WORD:BIT 12? MEAS:DIG:DATA 2:LWORD:BIT23? 50 HP E1459A SCPI Command Reference Parameter Type Numeric TYPE discrete BIT m Numeric Range of Values 0, 1, 2, or 3 for WORD;... -
Page 51: Memory Subsystem
Example MEM:DEL:MACR test_macro Parameter Type discrete The macro was previously defined using the *DMC Common Command. HP E1459A SCPI Command Reference MEMory Subsystem Range of Values up to 12 alphanumeric characters Deletes the macro named test_macro which was previously defined using the *DMC Common command. -
Page 52: Sense Subsystem
The SENSe Subsystem configures Event Detection in the HP E1459A Module. The HP E1459A has an event detector for each 16 bit Port to detect positive or negative edge transitions and whether new data is available: NEDGe PEDGe For details on using the SENSe Subsystem, refer to Chapter 2. -
Page 53: [Sense:]Event:portn:davailable:enable
0, 1, 2, 3 (PORT = PORT0) numeric or discrete 0, 1, OFF, ON INPut n :CLOCk[:SOURce]EXT Enables DAV on Port 1 Parameter Type Range of Values numeric 0, 1, 2, 3 (PORT = PORT0) HP E1459A SCPI Command Reference Default PORT0 Default PORT0... -
Page 54: [Sense:]Event:portn:edge
The Edge Event Status is cleared by reading PEDGE and/or NEDGE status registers for that port. • *RST Condition: not enabled. Example EVEN:PORT 2:EDGE:ENAB ON 54 HP E1459A SCPI Command Reference Parameter Type Range of Values numeric 0, 1, 2, 3 (PORT = PORT0) Parameter Type... -
Page 55: [Sense:]Event:portn:edge:enable
*RST Condition: disables the Edge Event. Parameter Type Range of Values numeric 0, 1, 2, 3 (PORT = PORT0) Parameter Type Range of Values numeric 0, 1, 2, 3 (PORT = PORT0) HP E1459A SCPI Command Reference Default PORT0 Default PORT0... -
Page 56: [Sense:]Event:portn:nedge:enable
A 1 means the mask is enabled for that bit, a 0 means the mask is disabled for that bit. • *RST Condition: clears the mask (no masked bits). 56 HP E1459A SCPI Command Reference Parameter Type Range of Values numeric... -
Page 57: [Sense:]Event:portn:pedge
Parameter Type Range of Values numeric 0, 1, 2, 3 (PORT = PORT0) numeric -32768 to +32767 (0000 Enables Positive Edge Event Detection on all bits of Port 1 HP E1459A SCPI Command Reference Default PORT0 Default PORT0 to FFFF... -
Page 58: [Sense:]Event:portn:pedge:enable
Example If the occurred on Ports 0 and 2 (values 1 and 4 respectively, see table). 58 HP E1459A SCPI Command Reference Parameter Type numeric Value Returned No Event occurred in any port... -
Page 59: [Sense:]Event:psummary:edge
An Edge vent occurred in Port 1 An Edge vent occurred in Port 2 An Edge vent occurred in Port 3 [SENSe:]EVENt:PORTn:EDGe? command returns a value of 10 it indicates an edge event EVEN:PSUM:EDGE? HP E1459A SCPI Command Reference Meaning command... -
Page 60: Status Subsystem
15 are included in Figure 3-1. Note The Questionable Status Condition, Event, and Enable registers exist for SCPI compliance only. No status bits are defined or reported in these registers. 60 HP E1459A SCPI Command Reference :OPERation :CONDition? :ENABle < mask >... - Page 61 Figure 3-1. HP E1459A Status System Register Diagram HP E1459A SCPI Command Reference...
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Page 62: Status:operation:condition
None • Comments The only bit in this register used by the HP E1459A is bit 9 (decimal weight 512) which contains the summary of the Operation Status Port register. • The Status Operation Condition register is not cleared by this command. It is cleared only by executing the PSUMmary:EVENt command. -
Page 63: Status:operation:enable
• Comments The only bit in the OPERation Status Register used by the HP E1459A is bit 9 (decimal weight 512) which contains the summary of the Operation Status Port Register. This is a destructive read so that all register bits are cleared after the read is executed. -
Page 64: Status:operation:psummary:enable
STATus:OPERation:PSUMmary:ENABle? Returns the value of the Operation Status Port Summary Enable Register as a signed 16 bit integer. Parameters None 64 HP E1459A SCPI Command Reference Parameter Type Range of Values numeric -32768 to 32767 (0000 Enables all bits of the Operation Status... -
Page 65: Status:operation:psummary[:Event]
QUES Status Event QUES Status enable Register Action none none presets to 0 none none presets to 0 HP E1459A SCPI Command Reference Register Action OPER Status condition none OPER Status event none OPER Status enable presets to 0 OPER PSUM condition... -
Page 66: Status:questionable:condition
Parameters None • Comments No bits are defined. • *RST and *CLS do not affect the value of the enable mask. • The STAT:PRESet command sets the value of the enable mask to 0. 66 HP E1459A SCPI Command Reference... -
Page 67: Status:questionable:enable
*CLS clears the contents of the Status Questionable Event Register. • STAT:PRESet does not affect the contents of the Status Questionable Event Register but does disable reporting the summary of this register in the Status Byte register (STB?) HP E1459A SCPI Command Reference... -
Page 68: System Subsystem
Returns the module description. Parameters Parameter Name < number > • Comments <number> must be equal to 1 since only one HP E1459A module is allowed in a single instrument (logical address). • The command returns the following string: Example SYSTem:CDEScription? 1 SYSTem:CTYPe? <... -
Page 69: System:error
Returns a decimal value in the form:YYY.R where YYY is the year and R is the revision number within that year. Since there is no SCPI subsystem defined for Digital I/O or Event Interrupts, the version returned will be: +0,"No error" 1990.0 HP E1459A SCPI Command Reference Requests the error messages. -
Page 70: Ieee 488.2 Common Commands
The following table lists the IEEE 488.2 Common Commands listed by functional group that can be executed by the HP E1459A Digital Input / Interrupt Module. However, commands are listed alphabetically in the reference. Example are shown in the reference when the com- mand has parameters or returns a non-trivial response;... -
Page 71: Command Quick Reference
Returns the module description. Returns the module card type. Queries the error register for error value and string to identify the error. Returns the SCPI version to which this module complies. HP E1459A SCPI Command Reference See Also page 41 page 41... - Page 72 72 HP E1459A SCPI Command Reference...
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Page 73: Hp E1459A Specifications
5 Volt Supply: Output voltage : 4.5 to 5.5 V DC. Maximum output current: 16 mA. Typical Time to Read 16-bit Word: 4 S using register access. Terminal Module: Screw type, removable, maximum wire size 16AWG. Input Circuit: HP E1459A Specifications Nominal Input Voltages Appendix A HP E1459A Specifications... - Page 74 74 HP E1459A Specifications...
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Page 75: Hp E1459A Register Definitions
HP E1459A Register Definitions Overview The HP E1459A Isolated Digital Input/Interrupt module is a register-based slave device. There are 64 isolated inputs which can be used for detecting rising and/or falling edges independently. Each 16 channels has a set of registers used to define the detection of interrupt conditions. -
Page 76: Addressing The Registers
VXI:READ and VXI:WRITE commands, the logical address is used to determine which VXI module is being accessed. Refer to the HP E1406 Command Module documentation for usage of the VXI:READ and VXI:WRITE commands and other related commands. The following commands are sent to the HP E1406 Command Module via the HP-IB. -
Page 77: Register Definitions
Register Definitions For example, for the HP 75000 Series C Mainframe with an HP E1406 Command Module, VXI A16 address space starts at 1F0000 the HP E1406 Command Module, the A16 space is divided so modules are addressed only at locations beginning with C000... -
Page 78: Manufacturer Id Register
= Hewlett-Packard A16 (only) register-based device Device Type register (base = 02 Digital Input/Interrupt, a read of the Device Type register returns 0154 This indicates it is a model HP E1459A. Device Type Register (base + 02 No Effect Always Returns 0154 Status/Control register (base = 04 bits perform control functions. - Page 79 All pending data available must be cleared (read) before this bit is reasserted. Note In applications requiring interrupts, a commander will have to be assigned as the interrupt handler of this module HP E1459A Register Definitions...
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Page 80: Edge Interrupt Status Register
Write Read 80 HP E1459A Register Definitions Bit 14 is the MODID bit. When a "0" is returned in bit 14 then the module has been selected with a high state on the P2 MODID line. If a "1" is returned then the module has not been selected. -
Page 81: Watchdog Timer Control/Status Register
This will cause the DAV line to be asserted and "1" to appear in the Data Available Status Register. Once read, the DAV line will be unasserted, and ) can be read or DOGENAB DOGSTATE DOGENAB ) can be read or written. It HP E1459A Register Definitions... - Page 82 (If bit 1 of the Command Register Word is set to a one, then bit 2 must always be set to zero.) In the HP E1459A the Data Ready Marker is guaranteed to be cleared when the clock source is switched from internal to external.
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Page 83: Channel Data Register Port 0/2
For Positive/Negative Edge Detect and Mask Registers, channels 32 through 47 are accessed when BS = 1 in the Status/Control Register. ) is read only. This Ch37 Ch36 Ch35 Ch34 Ch33 ) is read only. Ch37 Ch36 Ch35 Ch34 Ch33 HP E1459A Register Definitions Ch32 Ch32... -
Page 84: Negative Edge Detect Register Port 0/2
Ch46 Ch45 Ch44 84 HP E1459A Register Definitions The Negative Edge Detect Register for Port 0/2 (base + 16 This register captures any high to low transitions with a "1" in this register for any channel that has been enabled. A channel is enabled by setting a corresponding bit in the Negative Mask Register. -
Page 85: Debounce Clock Register Port 0 And Port1/ Port 2 And Port 3
512 S 2.0 - 2.26 mS 1 mS 4.1 - 4.6 mS 2 mS 8.2 - 9.2 mS 4.1 mS 16.4 - 18.4 mS 8.2 mS 32.8 - 36.9 mS 16.4 mS 65.5 - 73.8 mS HP E1459A Register Definitions... -
Page 86: Command Register Port 1/3
Register Value Command Register Port 1/3 b + 20 Write Read Always Returns FFF 86 HP E1459A Register Definitions Bit pattern (hex) Clock Frequency 000F 30.5 Hz 0010 15.3 Hz 0011 7.63 Hz 0012 3.82 Hz 0013 1.91 Hz 0014 0.954 Hz... -
Page 87: Channel Data Register Port 1/3
(If bit 1 of the Command Register Word is set to a one, then bit 2 must always be set to zero.) In the HP E1459A the Data Ready Marker is guaranteed to be cleared when the clock source is switched from internal to external. -
Page 88: Positive Edge Detect Register Port 1/3
Ch62 Ch61 Ch60 88 HP E1459A Register Definitions The Positive Edge Detect Register for Port 1/3 (base + 24 bit 4 of the Control/Status Register is low ("0"), Port 1 data is accessed. If bit 4 is high ("1"), Port 3 data will be accessed. The operation of the Positive Edge Detect Register for Port 1/3 is identical to those of Port 0/2. -
Page 89: Negative Mask Register Port 1/3
= 1 any value programmed into or read from this register will be the same as the register at b + 1E ) can be read or written. Ch21 Ch20 Ch19 Ch18 Ch17 Ch53 Ch52 Ch51 Ch50 Ch49 ) can be read or written. This DEBOUNCE TIME DEBOUNCE TIME HP E1459A Register Definitions Ch16 Ch48... - Page 90 Register Value Bit Pattern (Hex) 2 (or 0 ) Default 3 (or 1) 90 HP E1459A Register Definitions Clock Frequency Clock Period 0002 250 kHz 0003 125 kHz 0004 62.5 kHz 16 S 0005 31.25 kHz 32 S 0006 15.63 kHz...
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Page 91: Power On/Reset Conditions
This program was written and tested in Microsoft Visual C++ but should compile under any standard ANSI C compiler. To run this program you must have the HP SICL library, the HP VISA library, an HP-IB interface module installed in your PC, and an HP E2406 Command Module. -
Page 92: Output And Edge Detection Examples
The following three programming examples demonstrate edge detection, DAV, and mixed programming methods. This example is coded in HP BASIC for a System 9000 (Series 300) linked to a HP E1406 Command Module via HPIB. The example enables all four channel ports to detect both positive and negative edges on any channel of any port. - Page 93 OUTPUT Vxi_address;"SYST:ERR?" ENTER Vxi_address;Error PRINT "E1406 Reports Error: ";Error 200 UNTIL (Error=0) 210 ! 220 OUTPUT Vxi_address;"VXI:WRITE 128,4,1" ! reset E1459A 230 WAIT .1 240 OUTPUT Vxi_address;"VXI:WRITE 128,4,0" ! un-reset E1459A 250 WAIT .1 260 ! 265 ! unmask all 16 pos bits for port 0 270 OUTPUT Vxi_address;"VXI:WRITE 128,24,-1"...
- Page 94 DISP "Port 0: ";G0,"Port 1: ";G1,"Port 2: ";G2,"Port 3: ";G3,"Intr: ";Istat 860 END LOOP 870 ! 880 Service: ! 890 DISABLE INTR 7 895 ! disable E1459A ints, port 0/1 select 900 OUTPUT Vxi_address;"VXI:WRITE 128,4,0" 910 ! 920 A=SPOLL(Vxi_address) 930 OUTPUT Vxi_address;"STAT:OPER:EVEN?"...
- Page 95 1550 PRINT "Wrd 3 Neg Edge: ";B 1560 ! 1570 OUTPUT Vxi_address;"VXI:READ? 128,6" ! get int status register 1580 ENTER Vxi_address;E 1590 Istat=BINAND(E,15) 1600 PRINT "Edge Int Status: ";Istat 1610 ! 1620 PRINT 1630 ! 1640 OUTPUT Vxi_address;"DIAG:INT:SET1 ON" HP E1459A Register Definitions...
- Page 96 1720 RETURN 1730 END This example is coded in HP RMB for a System 9000 (Series 300) linked to a E1406 Command Module via HPIB. The example enables all four channel ports to capture channel data (and generate an interrupt) on the occurrance of an external capture clock at a corresponding port.
- Page 97 Istat=BINAND(E,15) DISP "DAV Status Reg: ";Istat 660 END LOOP 670 ! 680 Service: ! 690 DISABLE INTR 7 695 ! disable E1459A ints, port 0/1 select 700 OUTPUT Vxi_address;"VXI:WRITE 128,4,0" 710 ! 720 A=SPOLL(Vxi_address) 730 OUTPUT Vxi_address;"STAT:OPER:EVEN?" 740 ENTER Vxi_address;S_op 750 OUTPUT Vxi_address;"DIAG:INT:RESP?"...
- Page 98 1250 END Mixed Interupt Example This example is coded in HP RMB for a System 9000 (Series 300) linked to a E1406 Command Module via HPIB. The example enables all four channel ports to detect both positive and negative edges on the high order eight channels of any port.
- Page 99 355 ! set debounce to 16 uS (250 KHz) for ports 0/1 360 OUTPUT Vxi_address;"VXI:WRITE 128,30,2" 370 ! 375 ! E1459A ints disabled, port 2/3 select 380 OUTPUT Vxi_address;"VXI:WRITE 128,4,16" 390 ! 395 ! dav enable, ext clk, edge enable, port 2 400 OUTPUT Vxi_address;"VXI:WRITE 128,16,7"...
- Page 100 DISP "DAV Status Reg: ";Dstat,"EInt Status Reg: ";Istat 720 END LOOP 730 ! 740 Service: ! 750 DISABLE INTR 7 755 ! disable E1459A ints, port 0/1 select 760 OUTPUT Vxi_address;"VXI:WRITE 128,4,0" 770 ! 780 A=SPOLL(Vxi_address) 790 OUTPUT Vxi_address;"STAT:OPER:EVEN?" 800 ENTER Vxi_address;S_op 810 OUTPUT Vxi_address;"DIAG:INT:RESP?"...
- Page 101 1125 ! get neg edge register, port 1 1130 OUTPUT Vxi_address;"VXI:READ? 128,38" 1140 ENTER Vxi_address;B1 1150 ! 1155 ! E1459A ints disabled, port 2/3 select 1160 OUTPUT Vxi_address;"VXI:WRITE 128,4,16" 1170 ! 1175 ! get dav data register, port 2 1180 OUTPUT Vxi_address;"VXI:READ? 128,18"...
- Page 102 1880 OUTPUT Vxi_address;"DIAG:INT:SET1 ON" 1890 OUTPUT Vxi_address;"DIAG:INT:ACT ON" 1900 OUTPUT Vxi_address;"*OPC?" 1910 ENTER Vxi_address;Done 1920 ! 1930 ENABLE INTR 7;2 1935 !dav/edge int enabled, port 0/1 select 1940 OUTPUT Vxi_address;"VXI:WRITE 128,4,96" 1950 ! 1960 RETURN 102 HP E1459A Register Definitions...
- Page 103 1970 END HP E1459A Register Definitions...
- Page 104 104 HP E1459A Register Definitions...
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Page 105: Appendix C Error Messages
2034, “Register is read only” 3000, “Illegal while initiated” The following table lists error message and possible cause associated with the HP E1459A Module. <mask> is not in decimal format. A command does not include a required parameter (parameter cannot be defaulted). - Page 106 106 Error Messages...
- Page 107 HP E1459A 64-Channel Isolated Input Interrupt User’s Manual Symbols *CLS *DMC *EMC *EMC? *ESE *ESE? *ESR? *GMC? *IDN? *LMC? *OPC *OPC? *PMC *RCL *RMC *RST *SAV *SRE *SRE? *STB? *TRG *TST? *WAI Abbreviated Commands Address, logical Block, terminal Command abbreviated...
- Page 108 Polled Mode Power-on State Reset State Resolver , 29, SCPI Self Test SENSe EVENt PORTn PSUMmary Separator, Command SICL, HP Standard Command for Programmable Instruments Standard Commands for Programmable Instruments STATus OPERation ENABle? EVENt? PSUMmary DAVailable ENABle ENABle? DAVailable? EDGE...
- Page 109 EVENt? PRESet QUEStionable CONDition? ENABle ENABle? EVENt? SYSTem CDEScription? CTYPe? ERRor? VERSion? Terminal Block Thresholds, input , 14, Timer, Watchdog User Wiring VISA, HP Voltage, input , 14, Watchdog Timer Wiring Wiring, input Index...
- Page 110 Index...
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