LanParty P45 Series User Manual page 90

3
BIOS Setup
Clock Setting Fine Delay
Move the cursor to this field and press <Enter>. The following
screen will appear.
↑↓→←
F5: Previous Values
The screen above list all the fields available in the Clock Setting Fine Delay
submenu, for ease of reference in this manual. In the actual CMOS setup, you have
to use the scroll bar to view the fields. The settings on the screen are for refer-
ence only. Your version may not be identical to this one.
DRAM Default Skew Model
This field is used to select the DRAM's skew model.
Fine Delay Step Degree
This is used to select the fine delay step degree.
Ch1 Clock Crossing Setting and Ch2 Clock Crossing Setting
The options are Auto, More Aggressive, Aggressive, Nominal, Relaxed
and More Relaxed.
9 0
Phoenix - AwardBIOS CMOS Setup Utility
DRAM Default Skew Model
Fine Delay Step Degree
Ch1 Clock Crossing Setting
DIMM 1 Clock Fine Delay
DIMM 2 Clock Fine Delay
Ch1 Control0 Fine Delay
Ch1 Control1 Fine Delay
Ch1 Control2 Fine Delay
Ch1 Control3 Fine Delay
Ch1 Command Fine Delay
Ch2 Clock Crossing Setting
DIMM 3 Clock Fine Delay
DIMM 4 Clock Fine Delay
Ch2 Control0 Fine Delay
Ch2 Control1 Fine Delay
Ch2 Control2 Fine Delay
Ch2 Control3 Fine Delay
Ch2 Command Fine Delay
Ch1Ch2 CommonClock Setting
Ch1 RDCAS GNT-Chip Delay
Ch1 WRCAS GNT-Chip Delay
Ch1 Command to CS Delay
Ch2 RDCAS GNT-Chip Delay
Ch2 WRCAS GNT-Chip Delay
Ch2 Command to CS Delay
: Move Enter: Select +/-/PU/PD: Value
Clock Setting Fine Delay
Mode 0
70ps
Auto
Current 1126ps
Current 1126ps
Current 234ps
Current 234ps
Current 234ps
Current 234ps
Current 344ps
Auto
Current 1126ps
Current 1126ps
Current 234ps
Current 234ps
Current 234ps
Current 234ps
Current 344ps
Auto
Auto
Auto
Auto
Auto
Auto
Auto
F10: Save
F6: Fail-Safe Defaults
Item Help
Menu Level
ESC: Exit F1: General Help
F7: Optimized Defaults