Epson ELP-3500 Service Manual page 41

Circuit Block Diagram of the Video Board
Fuses
Power
F600 CCP2E20 (600 mA)
supply
F601 CCP2E20 (600 mA)
C
F602 CCP2E13 (520 mA)
N
6
0
RT 0 ~ 7
0
GT 0 ~ 7
BT 0 ~ 7
Data clock
H start
Display control signal
IC800
Shift clock
display timing
level shifter
generator
SCK
DXIN
Connecst to
1 ~ 6
CLXIN
the main
ROT
board CN200
R 1/2
Output divider
(Analog)
R1 ~ R6
Light Valve R Driver
(CN850)
+18 V
+12 V
+5 V
IC600
line buffer
Data clock
SCL/SDA
G 1/2
Output divider
(Analog)
G1 ~ 6
Light Valve G Driver
(CN900)
Figure 2-11.
2-12
EPSON ELP-3500 Service Manual
Regulator
Regulator
IC601
DAC
Analog R/G/B
Lamp 2
8 ch
Sub
DAC
brightness
circuit
8 ch
I/O
LCCOM
RAD
control
(J1/J2)
RAD
(J1/J2)
LCCOM
RAD (J1/J2)
R/G/B
Output divider
(Analog)
B1 ~ 6
Light Valve B Driver
(CN950)
5 VDA
Temperature
detection
Video AMP
Output lamp
+15 V
Driver
B 1/2
R 1/2
G 1/2
B 1/2