Ibo Zapper Panel: Mojo - Philips L04E Service Manual

Circuit Diagrams and PWB Layouts

IBO Zapper Panel: MOJO

1 2 3
MOJO
A
F102 F103
FOR DEV.
ONLY
F105
B F115
3114
10K
OPTION
3138
10K
3119
10K
+3V3 +3V3
C
{MOJO_TRST,MOJO_TDI,MOJO_TDO,MOJO_TMS,MOJO_TCK}
MIU_WEN
K2, K7
4102 4111
4112
K2 NOR_RYBY
4104 4113
4114
D
7100-2
PNX8316HS
E
(TS)
TS_DATA(0)
K7 2V2 20
0
TS_DATA(1) 0V TS_SYNC
K7 2V2 21 30
1 TS_SYNC
TS_DATA(2)
K7 2V2 22
2
TS_DATA(3) TS_CLK
K7 2V2 23 29 1V6
3 TS_DATA TS_STROBE
TS_DATA(4)
K7 2V2 24
4
K7 TS_DATA(5) 2V2 25 28 1V3 TS_VALID
5 TS_VAL
TS_DATA(6)
K7 2V2 26
6
TS_DATA(7)
K7 2V2 27
7
F
7100-3
PNX8316HS
168
CVBS
Y
0V C_CVBS
1V
K5 MOJO_I2S_OUT_SD 202 172
SD_OUT C
3135 22R (AV)
CVBS
0V 203
K5 MOJO_I2S_OUT_SCK
SCK_OUT
3134 22R 170
Y
K5 MOJO_I2S_OUT_WS 1V6 204
G WS_OUT CVBS
3133 22R
SPDIF B|Pb
0V
K4 1V6 206 163
SPDIF B
100R
3142
G|Y
205 165 0V
FSCLK G
Y
R|Pr
0V
167
R
C
F133
K2, K6, K7 I2C_LOCAL_SCL
H
F134
K2, K6, K7 I2C_LOCAL_SDA
4100
F135
K5 I2C_TV_SCL
3 2
OPTION
7103
BSN20
4101
F136
1 +3V3_MOJO
K5 I2C_TV_SDA
3 2
I
7104
BSN20 OPTION
1
+3V3_MOJO
OPTION
+3V3_MOJO +3V3_MOJO
3139 123 5606.1
1 2 3
L04E AB
4 5 6
1100
FTSH
F104
1103-1
1
1103-2
1104-1
1 2
1104-2
2 1103-3
1104-3 3
3
3139
MOJO_TDI
33R
MOJO_TDO
MOJO_TMS
CONFIGURABLE
+3V3
MOJO_TRST
7105
FXO-31FL
4 MOJO_TCK
1 VDD
K2, K3 RESET_n
4M0
3152
3 0V
1K0
GND 0V8
3153
2
680R
1V2
2117
OPTION
22p
K6 4MHz_MOJO
K7 4103
K7
K7
2118
RES
5103 22p
1V2clean
100MHz
5101
1V2
1V2_CORE
+1V2_MOJO
100MHz
2100
5102
10u
100MHz 2112 100n
2101 2113 100n
10u
2114 100n
K5
2102 2115 100n
10u
2116 100n
2103 100n
K5
100n
2104
K5 2105 100n
100n
2106
K5
100n
2107
2108 100n
2109 100n
100n
3143 100R 2110
3144 100R 2111 100n
7100-6
2132
PNX8316HS
10u 16V
(I2C-USB-SCO)
4V6 6
SCL0
37
SC0_CMDVCC 2131
4V6 7
SDA0
199
I100 USB_PWR 10u 16V
3146 100R 3V3 8
SCL1
200
I101 USB_DP 2130
3147 100R 3V3 9
SDA1
201
USB_DM 10u 16V
36
SC0_DA
40
+3V3_MOJO
SC0_CCK
198
USB_OVRCUR
38
SC0_RST
39
SC0_OFF
4 5 6
7. 62
7 8 9 10
FOR DEV.
ONLY
+3V3_MOJO
7100-8
PNX8316HS
3V2
208
TDI
(JTAG-ETAG-SYS)
3V2 207
TDO
5
SYS_RESETN
I104
DSU_TPC0
3V3 1 194 3122 33R
TMS 0
189
3123 33R
PCST0 1
0V 2 188 3124 33R 0V
TRST 2
3V3 3 197 3125 33R 0V
TCK 0
196 3126 33R 0V
F127 PCST1 1
4 3V3 195 0V
3127 33R
RESETN 2
F128
158
XTAL_IN
F130
159 187 3121 33R
XTAL_OUT DSU_TPC1
157 186 3120 33R +3V3_MOJO
AVDD_PLL DSU_CLK
160
AVSS_PLL
DSW_n
7100-1
PNX8316HS
41 42
78 (PWR) 79
119 120
VDDC VSSC
134 135
191 192
3V3
10 11
43 44
60 61
76 77
94 VDDP VSSP 95
111 112
130 131
161 162
190 193
+3V3clean
175 2119
0
100n
169 2120
AVDD 1
100n
164
2121
2
100n
171
1
IDUMP
166
2
I105
174
1V2
173
+3V3
7 8 9 10
11 12 13
7100-4
PNX8316HS
(SDRAM) 0V
K2 SDRAM_DATA(0) 0V 113 153
0 0
2V6 114 154 0V
K2 SDRAM_DATA(1)
1 1
0V
K2 SDRAM_DATA(2) 2V6 115 155
2 2
2V6
K2 SDRAM_DATA(3) 116 156 0V
3 3
K2 2V6 117 149 0V
SDRAM_DATA(4)
4 4
K2 SDRAM_DATA(5) 2V6 118 148 0V
5 5
0V
K2 SDRAM_DATA(6) 0V 121 147
6 6
SDRAM_ADDR
K2 2V3 122 146 0V
SDRAM_DATA(7)
7 7
2V9 0V
K2 SDRAM_DATA(8) 132 145
8 SDRAM_DATA 8
2V5
K2 SDRAM_DATA(9) 129 144 0V
9 9
0V
K2 0V 128 152
SDRAM_DATA(10)
10 10
0V
K2 SDRAM_DATA(11) 2V5 127 143
11 11
K2 0V
SDRAM_DATA(12) 2V3 126 142
12 12
K2 2V3 125 150 0V
SDRAM_DATA(13)
13 13
K2 SDRAM_DATA(14) 0V 124 151 0V
14 14
2V1
K2 2V3
SDRAM_DATA(15) 123 138
15 DQM0
133 3V1
DQM1
140 3V
CAS
2V9
141
RAS
3V
139
WE
3V3
137
CKE
1V5
136
HSCKB
7100-7
PNX8316HS
K6 RESET_FE_n
3V3 31
IR_IN
(GPIO)
K7 RESET_STV
0V
32
IR_OUT
K2 user_EEPROM_WP 4V6
185 17 0V
PWM DTR0
VS VCXO_CLOCK
dsp_EEPROM_WP F129
K6 UART1_RX
3V3 33 18 0V
VPP RX1
K6 FE_LOCK
3V3 UART1_TX F131
3V3 34 19
C4 TX1
K2 NOR_RYBY
3V3 35
C8 BOOT <0:3>
NOR_WP
K2 0V 0V
45 176 PIO19|ITU_OUT0|BOOT0
SC1_DA 0
STV_INT
K7 0V
46 177 0V PIO20|ITU_OUT1|BOOT1
SC1_CMDVCC 1
3V2
STV_A25
K7 0V PIO21|ITU_OUT2|BOOT2
47 178
SC1_RST 2
3V3
48 179
SC1_OFF 3
PIO22|ITU_OUT3|BOOT3
K4 RS232_DSR ITU_OUT
0V I103
49 180
SC1_CCK 4
K4 CTSN0 0V 12 181
CTS0 5
3V2
0V
K4 RTSN0 13 182
RTS0 6
F132 3151
RXD0 0V
K4 14 183 10K
RES
RX0 7
0V
K4 TXD0 0V
15 184
TX0 ITU_CLOCK
0V
K4 DCD0 16
DCD0 PIO <16:27> 3155
DSW_I2C_enable
0V 10K
PLL_OUTX0
RES
PIO <0:15>
7100-5
PNX8316HS
K2, K7 MIU_DATA(0) 0V 69 75 0V
0 0
K2, K7 MIU_DATA(1) 67 (MIU) 80
0V 3V3
1 1
K2, K7 MIU_DATA(2) 0V 65 81 0V
2 2
MIU_DATA(3)
K2, K7 0V 63 82 3V3
3 3
MIU_DATA(4)
K2, K7 0V 59 83 3V3
4 4
MIU_DATA(5)
K2, K7 0V 57 84 3V3
5 5
MIU_DATA(6)
K2, K7 0V 55 85 3V3
6 6
MIU_DATA(7) 0V 53 86 0V
K2, K7
7 7
K2, K7 MIU_DATA(8) 0V 68 MIU_DATA 87 0V
8 8
K2, K7 MIU_DATA(9) 0V 66 88 3V3
9 9
MIU_DATA(10)
K2, K7 0V 64 89 0V
10 10
MIU_DATA(11)
K2, K7 0V 62 90 0V
11 11
MIU_DATA(12) 0V 58 91 3V3
K2, K7
12 MIU_ADDR 12
MIU_DATA(13) 56 92 0V
K2, K7 0V
13 13
MIU_DATA(14) 0V 54 93 3V3
K2, K7
14 14
K2, K7 MIU_DATA(15) 0V 52 96 0V
15 15
97 0V
16
MIU_RDY
K7 3V3 109 98 3V3
MIU_RDY 17
99 3V3
18
K2 NOR_CS 3V3 74 100 3V3
MIU_CS_N0 19
101 3V3
20
K7 STV_CS 3V3 73 102 3V3
MIU_CS_N1 21
103 0V
22
72 104 0V
MIU_CS_N2 23
105 0V
24
71
MIU_CS_N3
107
MIU_MASK1
K2, K7 MIU_OEN 3V3 70
MIU_OE_N
110
MIU_LBA
MIU_WEN
K2, K7 3V3 108
MIU_WEN
50
MIU_BAA
106
MIU_MASK0
51
MIU_CLK
11 12 13
14 1100 A5 F107 B2
1101 B1 F108 B1
1102 E6 F109 B1
1103-1 B4 F110 B2
1103-2 B4 F111 B2
1103-3 B4 F112 B2
1104-1 B4 F113 B2
SDRAM_ADDR(0) K2
1104-2 B4 F114 B1
SDRAM_ADDR(1)
K2 1104-3 B4 F115 B3
1106 E14 F122 E10
SDRAM_ADDR(2) K2
2100 F6 F125 C4
A
2101 F6 F127 D7
SDRAM_ADDR(3) K2
2102 G6 F128 E7
SDRAM_ADDR(4)
K2 2103 G6 F129 E13
2104 G6 F130 E7
SDRAM_ADDR(5) K2
2105 G6 F131 E13
2106 G6 F132 F13
SDRAM_ADDR(6) K2
2107 H6 F133 H3
SDRAM_ADDR(7)
K2 2108 H6 F134 H3
2109 H6 F135 H2
SDRAM_ADDR(8) K2
2110 H6 F136 I2
2111 H6 I100 I3
SDRAM_ADDR(9) K2
2112 F6 I101 I3
SDRAM_ADDR(10)
K2 2113 F6 I103 F13
B 2114 G6 I104 D8
SDRAM_ADDR(11) K2
2115 G6 I105 I9
2116 G6
SDRAM_ADDR(12) K2
2117 E6
SDRAM_ADDR(13) K2
2118 F6
2119 H9
SDRAM_ADDR(14) K2
2120 H9
SDRAM_DQM0
2121 I9
K2
2122 C5
SDRAM_DQM1
K2
2130 I7
2131 I7
SDRAM_CAS
K2
2132 H7
C
SDRAM_RAS 2133 E7
K2
3100 C2
SDRAM_WE
K2
3101 D8
3112 E10
SDRAM_CKE
K2
3113 C5
SDRAM_CLK 3114 B1
K2
3115 B1
3116 B1
3117 C2
3119 C1
3120 E9
3121 E9
D
3122 D9
3123 D9
3141 3124 D9
3125 D9
10K
3126 D9
3127 D9
1106
B2B-PH-K 3128 E14
3129 F14
1
3130 E14
2
3131 E14
3133 G1
OPTION
E 3134 G1
3130 10K
3135 G1
3136 E14
3128 10K
+3V3
3137 F14
3131 10K 3138 B1
+3V3
3139 D7
OPTION
3136 10K
3140 I9
3141 D14
3129 10K
+3V3
3142 G1
OPTION
3137 10K
3143 H4
3144 H4
K5
TV_IRQ
3145 I2
+3V3 F
3146 I4
3147 I4
3148 I2
MOJO_656_CLK
K7
3149 I3
3150 I3
3151 F13
+3V3
3152 E5
3153 E5
3154 G13
3155 F13
4100 H3
4101 I2
G
4102 D2
4103 E5
MIU_ADDR(0) K2, K7
4104 D2
MIU_ADDR(1) K2, K7
4105 C3
MIU_ADDR(2) K2, K7
MIU_ADDR(3) K2, K7 4106 C3
MIU_ADDR(4) K2, K7
4107 C3
MIU_ADDR(5) K2, K7
4108 B4
MIU_ADDR(6) K2, K7
4109 C4
MIU_ADDR(7)
K2, K7
4110 C4
MIU_ADDR(8) K2, K7
MIU_ADDR(9) K2, K7 4111 D3
MIU_ADDR(10) K2, K7
4112 D3
MIU_ADDR(11) K2, K7
H 4113 D3
MIU_ADDR(12)
K2, K7
4114 D3
MIU_ADDR(13)
K2, K7
4115 B5
MIU_ADDR(14)
K2, K7
MIU_ADDR(15) K2, K7 5100 I7
MIU_ADDR(16) K2, K7
5101 F5
MIU_ADDR(17) K2, K7
5102 F5
MIU_ADDR(18) K2, K7
5103 F5
MIU_ADDR(19)
K2, K7
MIU_ADDR(20) 7100-1 F8
K2, K7
MIU_ADDR(21) K2, K7 7100-2 E2
MIU_ADDR(22) K2, K7
7100-3 F2
MIU_ADDR(23) K2, K7
7100-4 A12
MIU_ADDR(24) K2, K7
7100-5 G12
I
7100-6 H5
7100-7 D12
7100-8 C8
7103 I3
7104 I2
7105 D4
F102 A1
F103 A1
F104 B4
E_14970_025.eps
F105 B1
120804
F106 B2
14