Ic Block Diagram & Description - Sanyo DC-X8CT Service Manual

PARTS LIST
REF.NO. PART NO.
PR434 645 042 2553 PROTECTOR,0.63A 125V
! ! !
or 645 014 2468 PROTECTOR,0.63A 125V
! ! !
Q4300 405 141 3604 TR KTA1273-Y
! ! !
or 405 009 5207 TR 2SB927-S
! ! !
or 405 009 5306 TR 2SB927-T
! ! !
HEADPHONE P.W.BOARD ASSY
REF.NO. PART NO.
79 614 316 5873 ASSY,PWB,HEADPHONE (Only Initial)
CN680 645 011 6384 JACK,PHONE D3.6
CN681 645 011 6384 JACK,PHONE D3.6
CN682 614 310 2465 PLUG,5P
or 645 005 9292 PLUG,5P
CN683 614 310 2458 PLUG,4P
or 645 005 8110 PLUG,4P
L0151 645 001 5441 INDUCTOR,2.2U K
or 645 045 9139 INDUCTOR,2.2U K
L0152 645 006 9864 INDUCTOR,80U
or 614 212 3171 INDUCTOR,FERITE
L0153 645 006 9864 INDUCTOR,80U
or 614 212 3171 INDUCTOR,FERITE
IC BLOCK DIAGRAM & DESCRIPTION
IC601 M38B57MCH-A269FP (8-bit Microcomputer)
49 50 51 52
I/O ports
65 66 67 68 69 70 71 72
DESCRIPTION
DESCRIPTION
53 54 55 56 41 42 43 44 45 46
Port P0(8) Port P1(8)
Build-in peripheral functions
A-D converter
(10-bit x12 channel)
Serial I/O
Serial I/O1(Clock-synchronized)
(256 byte automatic transfer)
Serial I/O2
(Clock-synchronized or UART)
PWM1(8-bit)
PWM0(14-bit)
Buzzer output
FLD display function
40 control pins
(36 high-breakdown voltage ports)
Port P5(8) Port P6(6)
7 8 75 76 77 78
REF.NO. PART NO.
L6800 645 001 4550 INDUCTOR,10U K
or 645 031 7835 INDUCTOR,10U K
L6851 645 001 4550 INDUCTOR,10U K
or 645 031 7835 INDUCTOR,10U K
Q6880 405 151 4400 TR KTD1303
or 405 021 0204 TR 2SD1012-F-SPA
or 405 021 0600 TR 2SD1012-G-SPA
or 405 033 6706 TR 2SD1468S-R
or 405 033 6805 TR 2SD1468S-S
Q6881 405 151 4400 TR KTD1303
or 405 021 0204 TR 2SD1012-F-SPA
or 405 021 0600 TR 2SD1012-G-SPA
or 405 033 6706 TR 2SD1468S-R
or 405 033 6805 TR 2SD1468S-S
Q6882 405 143 6504 TR KTA1267-GR
or 405 004 4601 TR 2SA608-F-SPA
or 405 004 5103 TR 2SA608-G-SPA
or 405 006 1806 TR 2SA933S-R
or 405 006 1905 TR 2SA933S-S
47 57 58 59 60 61 62 63 64
48
Port P2(8)
Timers
Timer X(16-bit)
Timer 1(8-bit)
Timer 2(8-bit)
Timer 3(8-bit)
Timer 4(8-bit)
Timer 5(8-bit)
Timer 6(8-bit)
CPU core
Watchdog timer
Interrupt interval
determination function
Port P7(8)
1 2 3 4 5 6 79 80
- 16 -
DESCRIPTION
33 34 35 36 37 38 39 40 9 17 18 19 20 21 22 23
Port P3(8) Port P4(8)
Systrm clock generation
X -X
IN OUT
(main-clock)
X X
IN- COUT
(sub-clock)
Memory
ROM
RAM
Port P8(8) Port P9(2)
24 25 26 27 29 30 31 32 11 12