Sony HCD-S550 Service Manual page 95

Sacd/dvd receiver
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DVD BOARD IC801 CXD2752R (DSD DECODER)
Pin No.
Pin Name
1
VSCA0
2
XMSLAT
3
MSCK
4
MSDATI
5
VDCA0
6
MSDATO
7
MSREADY
8
XMSDOE
9
XRST
10
SMUTE
11
MCKI
12
VSIOA0
13
EXCKO1
14
EXCKO2
15
LRCK
16
F75HZ
17
VDIOA0
18 to 25 MNT0 to MNT7
26
TCK
27
TDI
28
VSCA1
29
TDO
30
TMS
31
TRST
32 to 34 TEST1 to TEST3
35
VDCA1
36
UBIT
37
XBIT
SUPDT0 to
38 to 41
SUPDT3
42
VSIOA1
43, 44
SUPDT4, SUPDT5
45
VDIOA1
46, 47
SUPDT6, SUPDT7
48
SUPEN
49
VSCA2
50
NC
51, 52
TEST4, TEST5
53
NC
54
VDCA2
55, 56
NC
57
BCKASL
58
VSDSD0
59
BCKAI
60
BCKAO
I/O
Ground terminal (for core)
I
Serial data latch pulse signal input from the mechanism controller
I
Serial data transfer clock signal input from the mechanism controller
I
Serial data input from the mechanism controller
Power supply terminal (+2.5V) (for core)
O
Serial data output to the mechanism controller
O
Ready signal output to the mechanism controller "L": ready
O
Serial data output enable signal output terminal Not used
I
Reset signal input from the mechanism controller "L": reset
I
Soft muting on/off control signal input from the mechanism controller "H": muting on
I
Master clock signal (33.8688 MHz) input
Ground terminal (for I/O)
O
Master clock signal (33.8688 MHz) output to the digital audio processor
O
External clock 2 signal output terminal Not used
O
L/R sampling clock signal (44.1kHz) output terminal Not used
O
Not used
Power supply terminal (+3.3V) (for I/O)
O
Monitor signal output terminal Not used
I
Clock signal input from the DVD system processor
I
Serial data input from the DVD system processor
Ground terminal (for core)
O
Serial data output to the DVD system processor
I
MS signal input from the DVD system processor
I
Reset signal input from the DVD system processor "L": reset
I
Input terminal for the test (normally: fixed at "L")
Power supply terminal (+2.5V) (for core)
O
Not used
O
Not used
O
Supplementary data output terminal Not used
Ground terminal (for I/O)
O
Supplementary data output terminal Not used
Power supply terminal (+3.3V) (for I/O)
O
Supplementary data output terminal Not used
O
Supplementary data enable signal output terminal Not used
Ground terminal (for core)
O
Not used
I
Input terminal for the test (normally: fixed at "L")
O
Not used
Power supply terminal (+2.5V) (for core)
O
Not used
Input/output selection signal input terminal of bit clock signal (2.8224 MHz) for DSD data output
I
"L": input (slave), "H": output (master) Fixed at "H" in this set
Ground terminal (for DSD data output)
I
Bit clock signal (2.8224 MHz) input terminal for DSD data output Not used
O
Bit clock signal (2.8224 MHz) output terminal for DSD data output Not used
HCD-S550/S880
Description
95

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