Sony HCD-S550 Service Manual page 88

Sacd/dvd receiver
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HCD-S550/S880
DVD BOARD IC607 CXD9617R (DIGITAL AUDIO SIGNAL PROCESSOR)
Pin No.
Pin Name
VSS
1
2
XRST
EXTIN
3
FS2
4
5
VDDI
6
FS1
PLOCK
7
8
VSS
MCLK1
9
10
VDDI
VSS
11
MCLK2
12
MS
13
14
SCKOUT
LRCKI1
15
16
VDDE
BCKI1
17
18
SDI1
LRCKO
19
BCKO
20
VSS
21
KFSIO
22
23
SDO1
24
SDO2
25
SDO3
SDO4
26
SPDIF
27
LRCKI2
28
BCKI2
29
SDI2
30
VSS
31
HACN
32
33
HDIN
HCLK
34
HDOUT
35
HCS
36
37
SDCLK
CLKEN
38
RAS
39
VDDI
40
41
VSS
CAS
42
DQM
43
44
CS0
45
WE0
88
I/O
Ground terminal
I
Reset signal input from the system controller "L": reset
I
Master clock signal input terminal Not used
I
Sampling frequency selection signal input terminal Not used
Power supply terminal (+2.6V)
I
Sampling frequency selection signal input terminal Not used
O
Internal PLL lock signal output terminal Not used
Ground terminal
I
System clock signal input terminal (13.5 MHz)
Power supply terminal (+2.6V)
Ground terminal
O
System clock signal output terminal (13.5 MHz)
I
Master/slave selection signal input terminal "L": slave, "H": master (fixed at "L" in this set)
O
Internal system clock signal output to the D/A converter and stream processor
I
L/R sampling clock signal (44.1 kHz) input from the digital audio processor
Power supply terminal (+3.3V)
I
Bit clock signal (2.8224 MHz) input from the digital audio processor
I
Front L-ch and R-ch audio serial data input from the digital audio processor
O
L/R sampling clock signal (44.1 kHz) output to the D/A converter and stream processor
O
Bit clock signal (2.8224 MHz) output to the D/A converter and stream processor
Ground terminal
I
Audio clock signal (11.2896 MHz) input from the digital audio processor
O
Front L-ch and R-ch audio serial data output to the stream processor
O
Center and woofer audio serial data output to the stream processor
O
Rear L-ch and R-ch audio serial data output to the stream processor
O
Audio serial data output to the D/A converter
O
S/PDIF signal output terminal Not used
I
L/R sampling clock signal (44.1 kHz) input from the A/D converter
I
Bit clock signal (2.8224 MHz) input from the A/D converter
I
Center and woofer audio serial data input from the digital audio processor
Ground terminal
O
Acknowledge signal output to the system controller
I
Write data input from the system controller
I
Clock signal input from the system controller
O
Read data output to the system controller
I
Chip select signal input from the system controller
O
Clock signal output terminal Not used
O
Clock enable signal output terminal Not used
O
Row address strobe signal output terminal Not used
Power supply terminal (+2.6V)
Ground terminal
O
Column address strobe signal output terminal Not used
O
Output terminal of data input/output mask Not used
O
Chip select signal output to the S-RAM
O
Write enable signal output to the S-RAM
Description

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