Iq-P.i.p.-Slm Circuit Block Diagram - Crown IQ–P.I.P.–SLM Reference Manual

IQ–P.I.P.–SLM Programmable Input Processor with Load Monitoring for IQ Systems
CH 1
AMP OUTPUT
VOLTAGE
CH 2
CH 1
AMP OUTPUT
CONVERTER
CURRENT
CH 2
CH 1
PIP INPUT
LEVEL
CH 2
+
BALANCE
-
CH 1
TO SINGLE
ENDED CONV.
BALANCED
AUDIO INPUTS
+
BALANCE
-
CH 2 TO SINGLE
ENDED CONV.
Reference Manual
REF VOLTAGE
A / D
RESET
AUX OUT
REM STANBY
DATA LED
IQ ADDR SWITCH
1
DIGITALLY
BUFFER
CONTROLLED
ANALOG STAGE
SWITCH
2
DDS SINE
WAVE GEN.
Fig. 5.1 IQ–P.I.P.–SLM Circuit Block Diagram
MONITOR INPUTS
INPUT
INPUT MUX
RECEIVER
A/D CONV.
OUTPUT
MICROCONTROLLER
DRIVER
8K x 8
EEPROM
8K x 8
1
1
DIGITALLY
BUFFER
CONTROLLED
ANALOG STAGE
ATTENUATOR
2
2
CROWN BUS
SERIAL
DATA INPUT
DROP-OUT
RELAY
CROWN BUS
SERIAL
DATA OUTPUT
RAM
1 CH 1
POLARITY INVERT
AUDIO OUTPUTS
& OUTPUT BUFFER
2 CH 2
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