Memory; Overview; Poweredge T710 Technical Guide; Dimm Slots - Dell PowerEdge T710 Technical Manual

Dell

7 Memory

7.1 Overview

The Dell™ PowerEdge™ T710 uses DDR3 memory providing a high performance, high-speed memory
interface capable of low latency response and high throughput. T710 supports Registered ECC DDR3
DIMMs (RDIMM) or Unbuffered ECC DDR3 DIMMs (UDIMM).
The DDR3 memory interface consists of three channels. The maximum number of supported DIMMs is
dependent on the type of DIMM used.
Single- or dual-rank RDIMM
Quad-rank RDIMM
Single- or dual-rank UDIMM
Key features of the T710 memory system include:

Registered (RDIMM) and Unbuffered (UDIMM) DDR3 technology

Each channel carries 64 data and eight ECC bits

Support for up to 192 GB of RDIMM memory (twelve 16 GB RDIMMs)

Support for up to 24 GB of UDIMM memory (twelve 2 GB UDIMMs)

Support for 1333 MT/s single- and dual-rank DIMMs

Support for 1066 MT/s quad-rank DIMMs

Support for 1.35V low voltage (LV) DIMMs

Single DIMM configuration with DIMM at socket DIMM A1

Support ODT (On Die Termination)

Clock gating (CKE) to conserve power when DIMMs are not accessed

DIMMs will enter a low power self-refresh mode
 2
I C access to SPD EEPROM and thermal sensors

Single Bit Error Correction

SDDC (Single Device Data Correction, x4 or x8 devices)

Multi Bit Error Detection

Support for Closed Loop Thermal Management on RDIMMs and UDIMMs

Support for Advanced ECC mode

Support for Memory Optimized mode

Support for Memory Mirroring

Support for Memory Sparing with 5600 series processors

7.2 DIMM Slots

T710 is equipped with 18 DIMM slots on the motherboard. No memory risers are utilized. Nine DIMM
slots are associated with each processor. Both processors must be populated in order to utilize all 18
DIMM slots.

7.3 DIMMs Supported

The T710 DDR3 interface supports 2 GB, 4 GB, 8 GB, or 16 GB RDIMMs and 1 GB or 2 GB UDIMMs.

PowerEdge T710 Technical Guide

Table 13. Maximum Configuration by DIMM Type
DIMM Type Maximum Configuration
3 per channel per processor (18 total)
2 per channel per processor (12 total)
2 per channel per processor (12 total)
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