Abit FATAL1TY AN9 32X User Manual page 53

DRAM Configuration:
Click <Enter> key to enter its submenu.
You may manually set the DRAM timing parameters through the following sub-items, or leave
them at their default settings according to the SPD (Serial Presence Detect) data stored in the
DRAM.
DRAM Timing Selectable
X - DRAM Clock
- DQS Timing Training
- CKE Base Power Down Mode
- CKE Base Power Down by
- Memclock Tri-Stating
X - TwTr Command Delay
X - Trfc0 for DIMM1
X - Trfc1 for DIMM2
X - Trfc2 for DIMM3
X - Trfc3 for DIMM4
X - Write Recovery Time(Twr)
X - Precharge Time(Trtp)
X - Row Cycle Time(Trc)
X - RAS2CAS R/W Delay(Trcd)
X - RAS to RAS Delay(Trrd)
X - Row Precharge Time(Trp)
X - Min. RAS Act-Time(Tras)
Memory Hole Remapping
DRAM ECC Enable
X - DRAM MCE Enable
X - Chip-Kill Mode Enable
X - DRAM ECC Redirection
X - DRAM Scrub Rate
X - L2 Cache Scrub Rate
X - DCache Scrub Rate
Auto Optimize Bottom IO
X - [31:24] IO Space
↓↑→←:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values
Back to Advanced Chipset Features Setup Menu:
SSE/SSE2 Instructions
This item allows you to Enable or Disable the SSE/SSE2 (Streaming SIMD Extensions)
instruction set.
System BIOS Cacheable
This item enables or disables caching the system BIOS for faster execution.
NVIDIA GPU Ex
Stands for "GPU Extra Performance". Enable this item to work for certain NVIDIA SLI graphics
cards with certain driver version, but only minor performance will be expected. Leave this item
at its default setting (Disabled).
Phoenix – Award BIOS CMOS Setup Utility
DRAM Configuration
Auto
DDR2 533
Skip DQS
Enabled
Channel
Disabled
2 Clocks
105 ns
75 ns
75 ns
75 ns
4 Clocks
2 Clocks
17 Clocks
4 Clocks
2 Clocks
4 Clocks
12 Clocks
Enabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Enabled
F0
F6: Fail-Safe Defaults
Item Help
F7: Optimized Defaults
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