Figure 2-3 Major System Components And Interconnections In The Cisco Asr 9000 Series Routers - Cisco ASR 9001-S Overview And Reference Manual

Chapter 2 Functional Description
Figure 2-3 Major System Components and Interconnections in the Cisco ASR 9000 Series Routers
RSP 0
Fabric
Interface
Chip
System Fabric VOQ
Timing Chip Scheduler
40x1GE
Fabric GE PHY
Line Card
Interface
Chip
FPGA FPGA
NPU NPU NPU
10 x 10 x 10 x
SFP SFP SFP
8x10GE 80G
Line Rate Card
Fabric
Interface
Chip
FPGA
NPU NPU NPU NPU
10 10 10 10
GE GE GE GE
X X X X
F F F F
P P P P
OL-17501-09
RSP 1
CPU
GE System
Switch Timing
Backplane
8x10GE 2:1
Fabric
Oversubscribed
Interface
Line Card
CPU
FPGA
NPU NPU NPU
10 10 10 10
GE GE GE GE
X X X X
10 x
F F F F
SFP
P P P P
Backplane
Fabric
GE
Interface
PHY
Chip
FPGA
CPU
NPU NPU NPU NPU
GE
SW
To
10 10 10 10
NPUs
GE GE GE GE
X X X X
F F F F
FPGAs
P P P P
Cisco ASR 9000 Series Aggregation Services Router Overview and Reference Guide
Fabric
Interface
Chip
Fabric VOQ
Chip Scheduler
4x10GE
GE PHY
Line Card
Chip
CPU
FPGA
NPU NPU NPU
10 10 10 10 10
GE GE GE GE GE
X X X X X
F F F F F
P P P P P
2x10GE + 20x1GE
Combo Line Card
Fabric
Interface
FPGA
NPU NPU
10x 10x
S S
F F
To
P P
CPU
Data Plane
Control Plane
GE
Switch
Fabric GE PHY
Interface
Chip
CPU
FPGA FPGA
NPU NPU NPU
10 10 10
GE GE GE
X X X
F F F
P P P
GE
PHY
Chip
FPGA CPU
NPU NPU
GE
SW
To
10 10
NPUs
GE GE
X X
To
F F
FPGAs
P P
Router Operation
2-3