Dram Timing Settings; Agp Timing Settings - JETWAY PM800DM User Manual

3-6-1

DRAM Timing Settings

CMOS Setup Utility – Copyright(C) 1984-2004 Award Software
System Performance
x RAS Active Time
x RAS Precharge Time
x RAS to CAS Delay
x DRAM CAS Latency
x Bank Interleave
DRAM Bus Select
DRAM Command Rate
↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
RAS Active Time
This field let's you insert a timing delay between the CAS and RAS strobe signals, used when DRAM
is written to, read from, or refreshed. Fast gives faster performance; and Slow gives more stable
performance. This field applies only when synchronous DRAM is installed in the system. The
settings are: 2T and 3T.
RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its charge before DRAM
refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast gives faster
performance; and Slow gives more stable performance. This field applies only when synchronous
DRAM is installed in the system. The settings are: 2T, 3T and 4T.
DRAM CAS Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the
DRAM timing. The settings are: 2T and 2.5T.
3-6-2

AGP Timing Settings

CMOS Setup Utility – Copyright(C) 1984-2004 Award Software
AGP Transfer Aperture Size
AGP Transfer Mode
AGP Driving Control
* AGP Driving Value
AGP Fast Write
AGP Master 1 WS Write
AGP Master 1 WS Read
CPU to AGP Post Write
AGP Delay Transaction
AGP 3.0 Calibration Cycle
VGA Share Memory Size
Direct Frame Buffer
↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
Note: Change these settings only if you are familiar with the chipset.
DRAM Timing Settings
Auto By SPD
9T
4T
4T
2.5
Disabled
Auto
2T Command
F6:Optimized Defaults
AGP Timing Settings
64M
4X
Auto
AA
Disabled
Enabled
Enabled
Enabled
Enabled
Disabled
64MB
Disabled
F6:Optimized Defaults
26
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Menu Level >>
F7:Standard Defaults
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F7:Standard Defaults