Hitachi IC25N040ATCS04-0 - Travelstar 40GN 40GB UDMA/100 4200RPM 2MB 2.5" IDE Hard Drive Specifications page 58

PDIAG-
This signal shall be asserted by device 1 to indicate to device 0 that it has completed the diagnostics.
This line is pulled up to 5 volts in the drive through a 10 kΩ resistor.
Following a Power On Reset, software reset, or RESET-, drive 1 shall negate PDIAG- within 1 ms (to
indicate to device 0 that it is busy). Drive 1 shall then assert PDIAG- within 30 seconds to indicate that
it is no longer busy and is able to provide status.
Following the receipt of a valid Execute Drive Diagnostics command, device 1 shall negate PDIAG-
within 1 ms to indicate to device 0 that it is busy and has not yet passed its drive diagnostics. If device
1 is present then device 0 shall wait up to 6 seconds from the receipt of a valid Execute Drive
Diagnostics command for drive 1 to assert PDIAG-. Device 1 should clear BSY before asserting
PDIAG-, as PDIAG- is used to indicate that device 1 has passed its diagnostics and is ready to post
status. If DASP- was not asserted by device 1 during reset initialization, device 0 shall post its own
status immediately after it completes diagnostics and clears the device 1 Status register to 00h.
Device 0 may be unable to accept commands until it has finished its reset procedure and is ready
(DRDY=1).
CSEL (Cable Select)
This signal is monitored to determine the drive address (master or slave) when the jumper on the
interface connector is at Position-3.
When CSEL is at ground or is at a low level, the drive works as a Master. If CSEL is open or is at a
logical high level, the drive works as a Slave.
The signal level of CSEL to one drive should be different from the signal level to another drive on the
same AT interface cable to avoid master-master or slave-slave configurations.
KEY
Pin position 20 has no connection pin. It is recommended to close the respective position of the cable
connector in order to avoid incorrect insertion.
IORDY
This signal is an indication to the host that the drive is ready to complete the current I/O cycle. This
line is driven low at the falling edge of DIOR- or DIOW- when the drive needs some additional WAIT
cycle(s) to extend the PIO cycle. This line can be connected to the host IORDY signal in order to
insert a WAIT state(s) into the host PIO cycle. This signal is an Open-Drain output with 24 mA sink
capability.
5V Power
There are two input pins for the +5 V power supply. One is the "+5 V Logic" input pin and the second
is the "+5 V Motor" input pin. These two input pins are tied together within the drive.
DMACK-
This signal shall be used by the host in response to DMARQ to either acknowledge that data has been
accepted, or that data is available.
This signal is internally pulled up to 5 Volt through a 15 kΩ resistor with a resistor tolerance value of
–50% to +100%.
DMARQ
This signal is used for DMA data transfers between the host and drive. It shall be asserted by the
drive when it is ready to transfer data to or from the host. The direction of data transfer is controlled by
-HIOR and -HIOW signals. This signal is used in a handshake mode with DMACK-. This signal is a
3-state line with 24 mA sink capability and internally pulled down to GND through a 10 kΩ resistor.
Hitachi Travelstar 60GH & 40GN hard disk drive specifications
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