Penryn 1/2 - Intel M570TU Service Manual

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Penryn 1/2

U 26 A

H _ A # [ 3 5: 3]

H _ A # 3

J 4

H 1

A [ 3 ] #

A D S #

H _ A # 4

L 5

E 2

A [ 4 ] #

B N R #

H _ A # 5

L 4

G 5

A [ 5 ] #

B P R I #

H _ A # 6

K 5

A [ 6 ] #

H _ A # 7

M 3

H 5

A [ 7 ] #

D E F E R #

H _ A # 8

N 2

F 2 1

A [ 8 ] #

D R D Y #

H _ A # 9

J 1

E 1

A [ 9 ] #

D B S Y #

H _ A # 1 0

N 3

A [ 1 0 ] #

H _ A # 1 1

P 5

F 1

A [ 1 1 ] #

B R 0 #

H _ A # 1 2

P 2

A [ 1 2 ] #

H _ A # 1 3

L 2

D 20

A [ 1 3 ] #

I E R R #

H _ A # 1 4

P 4

B 3

A [ 1 4 ] #

I N I T #

H _ A # 1 5

P 1

A [ 1 5 ] #

H _ A # 1 6

R 1

H 4

A [ 1 6 ] #

L OC K #

M 1

H _ A D S T B # 0

A D S T B [ 0 ] #

C 1

H _ R E Q# [ 4 : 0 ]

R E S E T #

H _ R E Q # 0

K 3

F 3

R E Q[ 0 ] #

R S [ 0 ] #

H _ R E Q # 1

H 2

F 4

R E Q[ 1 ] #

R S [ 1 ] #

H _ R E Q # 2

K 2

G 3

R E Q[ 2 ] #

R S [ 2 ] #

H _ R E Q # 3

J 3

G 2

R E Q[ 3 ] #

TR D Y #

H _ R E Q # 4

L 1

R E Q[ 4 ] #

G 6

H _ A # [ 3 5: 3]

H I T #

H _ A # 1 7

Y 2

E 4

A [ 1 7 ] #

H I TM #

H _ A # 1 8

U 5

A [ 1 8 ] #

H _ A # 1 9

R 3

A D 4

A [ 1 9 ] #

B P M [ 0 ] #

H _ A # 2 0

W 6

A D 3

A [ 2 0 ] #

B P M [ 1 ] #

H _ A # 2 1

U 4

A D 1

A [ 2 1 ] #

B P M [ 2 ] #

H _ A # 2 2

Y 5

A C 4

A [ 2 2 ] #

B P M [ 3 ] #

H _ A # 2 3

U 1

A C 2

A [ 2 3 ] #

P R D Y #

H _ A # 2 4

R 4

A C 1

A [ 2 4 ] #

P R E Q #

H _ A # 2 5

T 5

A C 5

A [ 2 5 ] #

T C K

H _ A # 2 6

T 3

A A 6

A [ 2 6 ] #

T D I

H _ A # 2 7

W 2

A B 3

A [ 2 7 ] #

T D O

H _ A # 2 8

W 5

A B 5

A [ 2 8 ] #

T M S

H _ A # 2 9

Y 4

A B 6

A [ 2 9 ] #

TR S T #

H _ A # 3 0

U 2

C 20

A [ 3 0 ] #

D B R #

H _ A # 3 1

V 4

A [ 3 1 ] #

H _ A # 3 2

W 3

A [ 3 2 ] #

H _ A # 3 3

A A 4

THE RMAL

A [ 3 3 ] #

H _ A # 3 4

A B 2

A [ 3 4 ] #

H _ A # 3 5

A A 3

D 21

A [ 3 5 ] #

P R O C H OT #

V 1

A 2 4

H _ A D S T B # 1

A D S T B [ 1 ] #

T H E R MD A

B 2 5

T H E R M D C

A 6

H _ A 2 0M #

A 2 0 M#

A 5

C 7

H _ F E R R #

F E R R #

T H E R MT R I P #

C 4

H _ I GN N E #

I GN N E #

D 5

H _ S T P C L K #

S T P C LK #

C 6

H CL K

H _ I N T R

L I N T 0

B 4

A 2 2

H _ N MI

L I N T 1

B C L K [ 0 ]

A 3

A 2 1

H _ S M I #

S M I #

B C L K [ 1 ]

H _ B P M 2_ 1 #

M 4

R S V D [ 0 1 ]

H _ B P M 2_ 0 #

N 5

R S V D [ 0 2 ]

T 2

H _ T H R M D A _ 2

R S V D [ 0 3 ]

V 3

H _ T H R M D C _ 2

R S V D [ 0 4 ]

H _ B P M 2_ 2 #

B 2

R S V D [ 0 5 ]

C P U _ GT L R E F 2

Z 0 20 6

D 2

R S V D [ 0 6 ]

D 2 2

R S V D [ 0 7 ]

H _ T D O _M

D 3

H _ T D O _ M

R S V D [ 0 8 ]

H _ T D I _ M

F 6

H _ T D I _ M

R S V D [ 0 9 ]

P e n ry n

1 . 0 5 V S

If P RO CH OT # i s ro ut ed b etw ee n CP U, IM VP a nd M CH ,

R 2 5

5 6 _ 0 4

H _I E R R #

pu ll -u p re sis to r ha s to be 7 5 oh m ? 5 %. I f no t

R 4 5 3

5 4 . 9 _ 1% _ 0 4

H _P R E Q #

us e, p ul l- up re si st or h as to b e 58 oh m ? 5%

R 8 0

5 6 _ 0 4

H _P R O C H OT #

3. 3 V

R 4 5 7

5 4 . 9 _ 1% _ 0 4

H _T M S

Layout Note:

R 4 5 8

5 4 . 9 _ 1% _ 0 4

H _T D I

Within 2.0"

R 4 5 6

5 4 . 9 _ 1% _ 0 4

H _T C K

of the CPU

R 4 6 1

5 6 _ 0 4

H _T R S T #

C 5 4 1 * 0 . 1 u_ 1 6 V _ 0 4

3. 3V S

R 2 7

1 K _ 0 4

I T P _ D B R S T #

C 5 3 5

*0 . 1 u _ 1 6V _0 4

2007/3/2

TH E R M_ R S T #

2 2

T H E R M _ R S T #

H _T DI

Layout No te:

C ir cu lt : 54. 9 oh m ch eck 1 50 o hm

Route H_T HERMDA and

H_THERMDC on same layer.

10 mil tr ace on 10 mil spacing .

H _A D S #

H _B N R #

H _B P R I #

H _ D # [ 6 3 : 0 ]

H _D E F E R # 4

H _D R D Y # 4

H _D B S Y # 4

H _B R 0 #

H _ I E R R #

H _I N I T #

1 3

H _L O C K # 4

H _C P U R S T # 4

H _R S # 0

H _R S # 1

H _R S # 2

H _T R D Y # 4

H _D S T B N # 0

H _ D S T B P # 0

H _H I T #

H _D I N V # 0

H _H I T M#

H _ D # [ 6 3 : 0 ]

H _ B P M 0#

H _ B P M 1#

H _ B P M 2#

H _ B P M 3#

H _ P R D Y #

H _ P R E Q#

H _ T C K

H _ T D I

H _ T D O

H _ T MS

H _ T R S T #

I T P _ D B R S T #

H _ P R O C H O T#

H _D S T B N # 1

H _ T H E R MD A

H _ D S T B P # 1

H _ T H E R MD C

H _D I N V # 1

P M _ TH R M T R I P # 5, 13

R 6 8

R 4 0 5

C 6 4 7

C LK _C P U _B C L K 1 8

10m ils

C LK _C P U _B C L K # 1 8

4 , 1 8

C P U _ B S E L 0

4 , 1 8

C P U _ B S E L 1

4 , 1 8

C P U _ B S E L 2

Lay out note:

Zo= 55 ohm, 0. 5"max

for GTLREF

C P U _ G T LR E F

R 4 63

2 K _ 1 % _0 4

EVT

2007/12/10

R 3 90

*0 _ 0 6

V _ TH R M

Q4 5

R 3 83

*A O 3 40 9

R 3 88

Z 0 2 14

* 0_ 0 6

R 3 8 7

C 5 3 9

* 10 K _ 0 4

R 3 8 2

Z 0 2 1 5

* 1 00 K _ 0 4

*1 0 U _ 1 0 V _ 08

* 0 _0 4

R 3 9 9

*2 0 K _ 0 4

U 2 3

R 3 9 6

V D D

TH E R M

Z 0 2 1 6

H _ TH E R MD A

* 10 0 K _ 0 4

D +

A L E R T

C 5 3 8

R 3 8 0

1 0 00 p _ 5 0V _0 4

D -

S D A T A

Q1 3

H _ TH E R MD C

GN D

S C L K

*2 N 70 0 2

a S C 7 5 2 5

? ? ? VGA? ? the rmal IC ? ? ? ?

Layout Not e:

ADM1031 SMbus = 98h

Near to Th ermal IC

G781-1 SMbus = 4Dh

3 , 5 , 9 , 12 , 1 3 , 1 4 , 1 5, 1 6 , 1 9 , 2 0 , 21 , 2 2 , 2 3 , 2 4, 25 , 2 8 , 3 0 , 3 3, 3 5 , 3 7

U 2 6 B

H _ D # 0

E 2 2

Y 2 2

H _D # 3 2

D [ 0 ] #

D [ 3 2 ] #

H _ D # 1

F 2 4

A B 2 4

H _D # 3 3

D [ 1 ] #

D [ 3 3 ] #

H _ D # 2

E 2 6

V 2 4

H _D # 3 4

D [ 2 ] #

D [ 3 4 ] #

H _ D # 3

G2 2

V 2 6

H _D # 3 5

D [ 3 ] #

D [ 3 5 ] #

H _ D # 4

F 2 3

V 2 3

H _D # 3 6

D [ 4 ] #

D [ 3 6 ] #

H _ D # 5

G2 5

T 2 2

H _D # 3 7

D [ 5 ] #

D [ 3 7 ] #

H _ D # 6

E 2 5

U 2 5

H _D # 3 8

D [ 6 ] #

D [ 3 8 ] #

H _ D # 7

E 2 3

U 2 3

H _D # 3 9

D [ 7 ] #

D [ 3 9 ] #

H _ D # 8

K 2 4

Y 2 5

H _D # 4 0

D [ 8 ] #

D [ 4 0 ] #

H _ D # 9

G2 4

W 2 2

H _D # 4 1

D [ 9 ] #

D [ 4 1 ] #

H _ D # 10

J2 4

Y 2 3

H _D # 4 2

D [ 1 0 ] #

D [ 4 2 ] #

H _ D # 11

J2 3

W 2 4

H _D # 4 3

D [ 1 1 ] #

D [ 4 3 ] #

H _ D # 12

H 2 2

W 2 5

H _D # 4 4

D [ 1 2 ] #

D [ 4 4 ] #

H _ D # 13

F 2 6

A A 2 3

H _D # 4 5

D [ 1 3 ] #

D [ 4 5 ] #

H _ D # 14

K 2 2

A A 2 4

H _D # 4 6

D [ 1 4 ] #

D [ 4 6 ] #

H _ D # 15

H 2 3

A B 2 5

H _D # 4 7

D [ 1 5 ] #

D [ 4 7 ] #

J2 6

Y 2 6

D S T B N [ 0] #

D S T B N [ 2 ] #

H 2 6

A A 2 6

D S T B P [ 0 ] #

D S TB P [ 2 ] #

H 2 5

U 2 2

D I N V [ 0 ] #

D I N V [ 2 ] #

H _ D # 16

N 2 2

A E 2 4

H _D # 4 8

D [ 1 6 ] #

D [ 4 8 ] #

H _ D # 17

K 2 5

A D 24

H _D # 4 9

D [ 1 7 ] #

D [ 4 9 ] #

H _ D # 18

P 2 6

A A 2 1

H _D # 5 0

D [ 1 8 ] #

D [ 5 0 ] #

H _ D # 19

R 2 3

A B 2 2

H _D # 5 1

D [ 1 9 ] #

D [ 5 1 ] #

H _ D # 20

L2 3

A B 2 1

H _D # 5 2

D [ 2 0 ] #

D [ 5 2 ] #

H _ D # 21

M2 4

A C 26

H _D # 5 3

D [ 2 1 ] #

D [ 5 3 ] #

H _ D # 22

L2 2

A D 20

H _D # 5 4

D [ 2 2 ] #

D [ 5 4 ] #

H _ D # 23

M2 3

A E 2 2

H _D # 5 5

D [ 2 3 ] #

D [ 5 5 ] #

H _ D # 24

P 2 5

A F 2 3

H _D # 5 6

D [ 2 4 ] #

D [ 5 6 ] #

H _ D # 25

P 2 3

A C 25

H _D # 5 7

D [ 2 5 ] #

D [ 5 7 ] #

H _ D # 26

P 2 2

A E 2 1

H _D # 5 8

D [ 2 6 ] #

D [ 5 8 ] #

H _ D # 27

T2 4

A D 21

H _D # 5 9

D [ 2 7 ] #

D [ 5 9 ] #

H _ D # 28

R 2 4

A C 22

H _D # 6 0

D [ 2 8 ] #

D [ 6 0 ] #

H _ D # 29

L2 5

A D 23

H _D # 6 1

D [ 2 9 ] #

D [ 6 1 ] #

H _ D # 30

T2 5

A F 2 2

H _D # 6 2

D [ 3 0 ] #

D [ 6 2 ] #

H _ D # 31

N 2 5

A C 23

H _D # 6 3

D [ 3 1 ] #

D [ 6 3 ] #

L2 6

A E 2 5

D S T B N [ 1] #

D S T B N [ 3 ] #

M2 6

A F 2 4

D S T B P [ 1 ] #

D S TB P [ 3 ] #

N 2 4

A C 20

D I N V [ 1 ] #

D I N V [ 3 ] #

A D 2 6

R 2 6

C OM P 0

G T LR E F

C O MP [ 0]

*1 K _ 0 4

C P U _ T E S T 1

C 2 3

MISC

U 2 6

C OM P 1

T E S T 1

C O MP [ 1]

*1 K _ 0 4

C P U _ T E S T 2

D 2 5

A A 1

C OM P 2

T E S T 2

C O MP [ 2]

Z 02 1 0

C 2 4

Y 1

C OM P 3

T E S T 3

C O MP [ 3]

*0 . 1 u _ X7 R _ 04

C P U _ T E S T 4

A F 2 6

T E S T 4

Z 02 1 1

A F 1

E 5

T E S T 5

D P R S T P #

Z 02 1 2

A 2 6

B 5

T E S T 6

D P S L P #

Z 02 1 3

C 3

D 2 4

T E S T 7

D P W R #

B 2 2

D 6

B S E L [ 0 ]

P W R G OO D

B 2 3

D 7

B S E L [ 1 ]

S L P #

C 2 1

A E 6

B S E L [ 2 ]

P S I #

P e nry n

R 4 6 2

1 K _ 1 % _ 04

1 . 0 5 V S

Layout n ote:

COMP0, C OMP2: 0.5" Max, Zo=27 .4 Ohms

COMP1, C OMP3: 0.5" Max, Zo=55

Best est imate is 18 mils wide trace for outer

V D D 3

layers a nd 14 mils wide trace if on internal

layers.

C 5 2 7

C O MP 0

R 3 7 7

R 3 7 8

R 3 7 5

C O MP 1

*0 . 1 u _1 6 V _ 0 4

C O MP 2

4. 7 K _ 0 4

4 . 7K _0 4

*1 0 K _ 0 4

C O MP 3

V _ T H R M _R

3 , 1 5 , 2 2

R 4 4 5

P M _ TH R M# _ R 3

P M_ T H R M # 3, 15 , 2 2

5 4 . 9 _1 % _ 0 4

* 0 _0 4

S MD _ T H E R M 3, 2 2

S MC _ T H E R M 3, 2 2

3 , 4 , 9 , 1 3 , 1 6, 2 3 , 3 2

1 . 0 5V S

1 4, 1 5 , 1 6 , 1 9 , 21 , 2 8 , 2 9 , 3 0, 31 , 3 2 , 3 4 , 3 6, 3 7 , 3 8

3 . 3 V

3 . 3 V S

3, 4 , 1 3 , 2 2 , 2 3, 24 , 2 9 , 3 3 , 3 4, 3 7 , 3 8

V D D 3

Schematic Diagrams

H _ D # [ 6 3 : 0 ] 4

H _ D S T B N # 2 4

H _ D S T B P # 2 4

H _ D I N V # 2 4

H _ D # [ 6 3 : 0 ] 4

Sheet 2 of 42

Penryn 1/2

H _ D S T B N # 3 4

H _ D S T B P # 3 4

H _ D I N V # 3 4

H _ D P R S T P # 5 , 1 3, 35

H _ D P S L P # 1 3

H _ D P W R # 4

H _ P W R GD

1 3

H _ C P U S L P # 4

P S I #

Ohms

R 45 2

R 4 3 6

R 4 3 4

2 7. 4_ 1 % _ 04

5 4 . 9 _ 1% _ 0 4

2 7 . 4 _ 1% _ 0 4

Penryn 1/2 B - 3

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Penryn 1/2 - Intel M570TU Service Manual

Penryn 1/2

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