Advertisement
MB15C101
■ FUNCTIONAL DESCRIPTIONS
Two different frequencies can be selected by Div input "H" or "L".
The divide ratios are calculated using the following equation:
= {(P × N) + A} × f
f
VCO
OSC
Symbol
fvco
Output frequency of external VCO
fosc
Reference oscillation frequency
N
Divide ratio of the main counter
A
Divide ratio of the swallow counter
Preset divide ratio of dual modulus
P
prescaler
R
Divide ratio of the reference counter
■ PHASE DETECTOR TIME CHART
fr
fp
t
WU
LD
D
O
Note: • .Phase error detection range: –2π to +2π
• Pulses on Do output signal during locked state are output to prevent dead zone.
• LD output becomes low when phase is t
less and continues to be so for three cycles or more.
• .t
and t
depend on OSCin input frequency.
WU
WL
t
> 8/fosc (s) (e. g.t
WU
t
< 16/fosc (s) (e. g. t
WL
6
÷ R
(A < N)
Description
t
WL
WU
> 625.0ns, foscin = 12.8 MHz)
WU
< 1250.0ns, foscin = 12.8 MHz)
WL
Div = "H"
233.15 MHz
19.2 MHz
291
7
16/17
384 (fr = 50 kHz)
or more. LD output becomes high when phase error is t
Div = "L"
259.20 MHz
19.2 MHz
33
12
16/17
40 (fr = 480 kHz)
High impedance
or
WL
Advertisement
