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Elan EM78P156N Manual

8-bit micro-controller
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EM78P156N
OTP ROM
EM78P156N
8-BIT MICRO-CONTROLLER
Version 1.2

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Имран
March 11, 2025

Elan mikrokontreller

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Mr. Anderson
March 11, 2025

The Elan EM78P156N is an 8-bit microcontroller designed with low-power, high-speed CMOS technology. It features a 1K×13-bit Electrical One-Time Programmable Read-Only Memory (OTP-ROM). The microcontroller includes three protection bits to secure user code and has eight option bits for customization. It supports an operating voltage range of 2.5V to 5.5V. The EM78P156N allows easy programming and development using an EMC Writer.

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Имран
March 11, 2025

Mikrokontreller EM7520N8S2006RBTS2025E

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Summary of Contents for Elan EM78P156N

  • Page 1 EM78P156N OTP ROM EM78P156N 8-BIT MICRO-CONTROLLER Version 1.2...
  • Page 2 EM78P156N OTP ROM Specification Revision History Version Content Initial version Change Power on reset content 07/01/2003 Add the Device Characteristic at section 6.3 07/29/2004 Application Note AN-001 EM78P156N v.s. EM78P156E on the DC Characteristics This specification is subject to change without prior notice. 07.29.2004 (V1.2)

  • Page 3: General Description

    EM78P156N OTP ROM 1. GENERAL DESCRIPTION EM78P156N is an 8-bit microprocessor designed and developed with low-power, high-speed CMOS technology.. It is equipped with 1K*13-bits Electrical One Time Programmable Read Only Memory (OTP-ROM). It provides three PROTECTION bits to prevent user’s code in the OTP memory from being intruded.
  • Page 4 EM78P156N OTP ROM 2. FEATURES • Operating voltage range : 2.5V~5.5V • Operating temperature range: -40°C~85°C • Operating frequency rang (base on 2 clocks ): * Crystal mode: DC~20MHz at 5V, DC~8MHz at 3V, DC~4MHz at 2.5V. * ERC mode: DC~4MHz at 5V, DC~4MHz at 3V, DC~4MHz at 2.5V. •...
  • Page 5 EM78P156N OTP ROM * 20 pin SSOP 209mil : EM78P156NKM • 99.9% single instruction cycle commands • The transient point of system frequency between HXT and LXT is around 400KHz This specification is subject to change without prior notice. 07.29.2004 (V1.2)

  • Page 6: Pin Assignments

    EM78P156N OTP ROM 3. PIN ASSIGNMENTS OSCI OSCI OSCI /RESET OSCO /RESET OSCO /RESET OSCO P60/INT P60/INT P60/INT Fig. 1 Pin Assignment Table 1 EM78P156NP and EM78P156NM Pin Description Symbol Pin No. Type Function * Power supply. * XTAL type: Crystal input terminal or external clock input pin. OSCI * ERC type: RC oscillator input pin.
  • Page 7 EM78P156N OTP ROM Table 2 EM78P156NAS Pin Description Symbol Pin No. Type Function * Power supply. * XTAL type: Crystal input terminal or external clock input pin. OSCI * ERC type: RC oscillator input pin. * XTAL type: Output terminal for crystal oscillator or external clock input pin. OSCO * RC type: Instruction clock output.

  • Page 8: Function Description

    EM78P156N OTP ROM 4. FUNCTION DESCRIPTION OSCO /RESET OSCI /INT WDT timer Oscillator/Timing Control Stack Prescaler IOCA Interrupt Instruction Controller Register R1(TCC) Instruction Decoder DATA & CONTROL BUS P60//INT IOC6 IOC5 PORT 6 PORT 5 Fig. 2 Function Block Diagram 4.1 Operational Registers 1.
  • Page 9 EM78P156N OTP ROM 3. R2 (Program Counter) & Stack • Depending on the device type, R2 and hardware stack are 10-bits wide. The structure is depicted in Fig.3. • Generating 1024×13 bits on-chip OTP ROM addresses to the relative programming instruction codes.
  • Page 10 EM78P156N OTP ROM Address R PAGE registers IOC PAGE registers (IAR) Reserve (TCC) CONT (Control Register) (PC) Reserve (Status) Reserve (RSR) Reserve (Port5) IOC5 (I/O Port Control Register) (Port6) IOC6 (I/O Port Control Register) Reserve Reserve Reserve Reserve Reserve Reserve Reserve IOCA (Prescaler Control Register)
  • Page 11 EM78P156N OTP ROM 4. R3 (Status Register) • Bit 0 (C) Carry flag • Bit 1 (DC) Auxiliary carry flag • Bit 2 (Z) Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero. •...

  • Page 12: Special Purpose Registers

    EM78P156N OTP ROM • RF can be cleared by instruction but cannot be set. • IOCF is the interrupt mask register. • Note that the result of reading RF is the "logic AND" of RF and IOCF. 8. R10 ~ R3F •...
  • Page 13 EM78P156N OTP ROM • CONT register is both readable and writable. 3. IOC5 ~ IOC6 (I/O Port Control Register) • "1" put the relative I/O pin into high impedance, while "0" defines the relative I/O pin as output. • Only the lower 4 bits of IOC5 can be defined. •...
  • Page 14 EM78P156N OTP ROM • Bit 5 (OD5) Control bit is used to enable the open-drain of P65 pin. • Bit 6 (OD6) Control bit is used to enable the open-drain of P66 pin. • Bit 7 (OD7) Control bit is used to enable the open-drain of P67 pin. •...

  • Page 15: Iocf (Interrupt Mask Register)

    EM78P156N OTP ROM Setting the ROC to "1" will enable the status of R-option pins (P50∼P51) that are read by the controller. Clearing the ROC will disable the R-option function. If the R-option function is selected, user must connect the P51 pin or/and P50 pin to VSS with a 430KΩ external resistor (Rex). If the Rex is connected/disconnected, the status of P50 (P51) is read as "0"/"1".
  • Page 16 EM78P156N OTP ROM CLK=Fosc/4 is used if CLK bit is "1". If TCC signal source comes from external clock input, TCC is increased by 1 at every falling edge or rising edge of TCC pin. • The watchdog timer is a free running on-chip RC oscillator. The WDT will keep on running even when the oscillator driver has been turned off (i.e.
  • Page 17 EM78P156N OTP ROM R-option function is used, it is recommended that P50~P51 are used as output pins. When R-option is in enable state, P50~P51 must be programmed as input pins. Under R-option mode, the current/power consumption by Rex should be taken into the consideration to promote energy conservation. The I/O registers and I/O control registers are both readable and writable.
  • Page 18 EM78P156N OTP ROM PCRD PCWR P61~P67 PORT PDWR PDRD NOTE: Pull-high (down) and Open-drain are not shown in the figure. Fig. 7(b) The Circuit of I/O Port and I/O Control Register for P61~P67 IOCE.1 Interrupt RE.1 ENI Instruction DISI Instruction Interrupt (Wake-up from SLEEP) /SLEP...
  • Page 19 EM78P156N OTP ROM Table 4 Usage of Port 6 Input Change Wake-up/Interrupt Function Usage of Port 6 input status changed Wake-up/Interrupt (I) Wake-up from Port 6 Input Status Change (II) Port 6 Input Status Change Interrupt (a) Before SLEEP 1. Read I/O Port 6 (MOV R6,R6) 1.

  • Page 20: Reset And Wake-Up

    EM78P156N OTP ROM 4.5 RESET and Wake-up 1. RESET A RESET is initiated by one of the following events- (1) Power on reset. (2) /RESET pin input "low", or (3) WDT time-out (if enabled). The device is kept in a RESET condition for a period of approx. 18ms (one oscillator start-up timer period) after the reset is detected.
  • Page 21 EM78P156N OTP ROM vector following wake-up. If ENI is executed before SLEP, the instruction will begin to execute from the address 008H after wake-up. If DISI is executed before SLEP, the operation will restart from the succeeding instruction right next to SLEP after wake-up. Only one of Cases 2 and 3 can be enabled before entering the sleep mode.
  • Page 22 EM78P156N OTP ROM Table 5 The Summary of the Initialized Values for Registers Address Name Reset Type Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit Name Power-On IOC5 /RESET and WDT Wake-Up from Pin Change Bit Name Power-On...
  • Page 23 EM78P156N OTP ROM Address Name Reset Type Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 /RESET and WDT Wake-Up from Pin Change Bit Name EXIF ICIF TCIF Power-On 0x0F RF(ISR) /RESET and WDT Wake-Up from Pin Change Bit Name Power-On...
  • Page 24 EM78P156N OTP ROM 1. A power-on condition, 2. A high-low-high pulse on /RESET pin, and 3. Watchdog timer time-out. The values of T and P, listed in Table 4 are used to check how the processor wakes up. Table 5 shows the events that may affect the status of T and P.
  • Page 25 EM78P156N OTP ROM 4.6 Interrupt The EM78P156N has three falling-edge interrupts listed below: (1) TCC overflow interrupt (2) Port 6 Input Status Change Interrupt (3) External interrupt [(P60, /INT) pin]. Before the Port 6 Input Status Change Interrupt is enabled, reading Port 6 (e.g. "MOV R6,R6") is necessary.
  • Page 26 EM78P156N OTP ROM IRQn /IRQn IRQm RFRD ENI/DISI IOCFWR IOCF /RESET IOCFRD RFWR Fig. 10 Interrupt Input Circuit 4.7 Oscillator 1. Oscillator Modes The EM78P156N can be operated in three different oscillator modes, such as External RC oscillator mode (ERC), High XTAL oscillator mode (HXT), and Low XTAL oscillator mode (LXT). User can select one of them by programming OSC and HLF in the CODE option register.
  • Page 27 EM78P156N OTP ROM Table 9 The Summary of Maximum Operating Speeds Conditions Fxt max.(MHz) Two cycles with two clocks 20.0 2. Crystal Oscillator/Ceramic Resonators (XTAL) EM78P156N can be driven by an external clock signal through the OSCI pin as shown in Fig. 11 below. OSCI Ext.
  • Page 28 EM78P156N OTP ROM Table 10 Capacitor Selection Guide for Crystal Oscillator or Ceramic Resonator Oscillator Type Frequency Mode Frequency C1(pF) C2(pF) 455 kHz 100~150 100~150 Ceramic Resonators 2.0 MHz 20~40 20~40 4.0 MHz 10~30 10~30 32.768kHz 100KHz 200KHz Crystal Oscillator 455KHz 20~40 20~150...

  • Page 29: Code Option Register

    EM78P156N OTP ROM Rext OSCI Cext EM78P156N Fig. 13 Circuit for External RC Oscillator Mode Table 11 RC Oscillator Frequencies Cext Rext Average Fosc 5V,25°C Average Fosc 3V,25°C 3.3k 3.92 MHz 3.65 MHz 5.1k 2.67 MHz 2.60 MHz 20 pF 1.39MHz 1.40 MHz 100k...
  • Page 30 EM78P156N OTP ROM Word 0 Word 1 Bit12~Bit0 Bit12~Bit0 1. Code Option Register (Word 0) WORD 0 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLKS ENWDTB HLF OSC HLP • Bit 12 ¡ B 11 ¡ B 10 ¡ B 9:Not used. Reserved.

  • Page 31: Power On Considerations

    EM78P156N OTP ROM Enable Enable Enable Enable Disable 2. Customer ID Register (Word 1) Bit 12~Bit 0 XXXXXXXXXXXXX • Bit 12~0: Customer’s ID code 4.9 Power On Considerations Any microcontroller is not guaranteed to start to operate properly before the power supply stays at its steady state.

  • Page 32: Residue-Voltage Protection

    EM78P156N OTP ROM /RESET EM78P156N Fig. 14 External Power-Up Reset Circuit 4.11 Residue-Voltage Protection When battery is replaced, device power (Vdd) is taken off but residue-voltage remains. The residue-voltage may trips below Vdd minimum, but not to zero. This condition may cause a poor power on reset. Fig.18 and Fig. 19 show how to build a residue-voltage protection circuit.

  • Page 33: Instruction Set

    EM78P156N OTP ROM EM78P156N / RESET Fig. 16 Circuit 2 for the Residue Voltage Protection 4.12 Instruction Set Each instruction in the instruction set is a 13-bit word divided into an OP code and one or more operands. Normally, all instructions are executed within one single instruction cycle (one instruction consists of 2 oscillator periods), unless the program counter is changed by instruction "MOV R2,A", "ADD R2,A", or by instructions of arithmetic or logic operation on R2 (e.g.
  • Page 34 EM78P156N OTP ROM (2) The I/O register can be regarded as general register. That is, the same instruction can operate on I/O register. The symbol "R" represents a register designator that specifies which one of the registers (including operational registers and general purpose registers) is to be utilized by the instruction. "b" represents a bit field designator that selects the value for the bit which is located in the register "R", and affects operation.
  • Page 35 EM78P156N OTP ROM R(7) → C, C → A(0) R(n) → R(n+1), 0 0110 11rr rrrr 06rr RLC R R(7) → C, C → R(0) R(0-3) → A(4-7), 0 0111 00rr rrrr 07rr SWAPA R None R(4-7) → A(0-3) R(0-3) ↔ R(4-7) 0 0111 01rr rrrr 07rr SWAP R...

  • Page 36: Timing Diagrams

    EM78P156N OTP ROM 4.13 Timing Diagrams AC Test Input/Output Waveform TEST POINTS AC Testing : Input is driven at 2.4V for logic "1",and 0.4V for logic "0".Timing measurements are made at 2.0V for logic "1",and 0.8V for logic "0". RESET Timing (CLK="0") Instruction 1 Executed /RESET...
  • Page 37 EM78P156N OTP ROM 5. ABSOLUTE MAXIMUNM RATINGS EM78P156N Items Rating Temperature under bias -40°C to 85°C Storage temperature -65°C to 150°C Working voltage 2.5 to 5.5V Working frequency DC to 20MHz* Input voltage Vss-0.3V to Vdd+0.5V Output voltage Vss-0.3V to Vdd+0.5V *These parameters are characterized but not tested.

  • Page 38: Dc Electrical Characteristic

    EM78P156N OTP ROM 6. ELECTRICAL CHARACTERISTICS 6.1 DC Electrical Characteristic (Ta=25 °C, VDD=5V±5%, VSS=0V) Symbol Parameter Condition Typ. Unit XTAL: VDD to 3V Two cycle with two clocks XTAL: VDD to 5V Two cycle with two clocks 20.0 ERC: VDD to 5V R: 5.1KΩ, C: 100 pF F±30% F±30%...

  • Page 39: Ac Electrical Characteristic

    EM78P156N OTP ROM 6.2 AC Electrical Characteristic (Ta=25 °C, VDD=5V±5%, VSS=0V) Symbol Parameter Conditions Unit Dclk Input CLK duty cycle Instruction cycle time Crystal type Tins (CLKS="0") RC type Ttcc TCC input period (Tins+20)/N* Tdrh Device reset hold time 11.8 16.8 21.8 Trst...

  • Page 40: Device Characteristic

    EM78P156N OTP ROM 6.3 Device Characteristic The graphs provided in the following pages were derived based on a limited number of samples and are shown here for reference only. The device characteristic illustrated herein are not guaranteed for it accuracy. In some graphs, the data maybe out of the specified warranted operating range.
  • Page 41 EM78P156N OTP ROM Vth (Input thershold voltage) of I/O pins Max(-40¢ J to 85¢ J ) Typ 25¢ J Min(-40¢ J to 85¢ J ) VDD (Volt) Fig. 18 Vth (Threshold voltage) of Port5 vs. VDD This specification is subject to change without prior notice. 07.29.2004 (V1.2)
  • Page 42 EM78P156N OTP ROM Voh/Ioh (5V) Voh/Ioh (3V) Min 85¢ J Min 85¢ J Typ 25¢ J Typ 25¢ J Min -40¢ J Min -40¢ J Voh (Volt) Voh (Volt) Fig. 19 Port5 and Port6 Voh vs. Ioh, VDD=5V Fig. 20 Port5 and Port6 Voh vs. Ioh, VDD=3V...
  • Page 43 EM78P156N OTP ROM Vol/Iol (5V) Vol/Iol (3V) Max -40¢ J Max -40¢ J Typ 25¢ J Typ 25¢ J Min 85¢ J Min 85¢ J Vol (Volt) Vol (Volt) Fig. 21 Port5, Port6 Vol vs. Iol, VDD = 5V Fig. 22 Port5, Port6 Vol vs. Iol, VDD = 3V This specification is subject to change without prior notice.
  • Page 44 EM78P156N OTP ROM WDT Time out Max 85¢ J Max 70¢ J Typ 25¢ J Min 0¢ J Min -40¢ J VDD (Volt) Fig. 23 WDT time out period vs. VDD, perscaler set to 1:1...
  • Page 45 EM78P156N OTP ROM Cext = 100pF, Typical RC Frequency vs. VDD R = 3.3K R = 5.1K R = 10K R = 100K VDD (Volt) Fig. 24 Typical RC OSC Frequency vs. VDD (Cext= 100pF, Temperature at 25¢ J ) VDD = 5V VDD = 3V Fig.
  • Page 46 EM78P156N OTP ROM Four conditions exist with the Operating Current ICC1 to ICC4. These conditions are as follows: ICC1: VDD=3V, Fosc=32K Hz, 2 clocks, WDT disable ICC2: VDD=3V, Fosc=32K Hz, 2 clocks, WDT enable ICC3: VDD=5V, Fosc=4M Hz, 2 clocks, WDT enable ICC4: VDD=5V, Fosc=10M Hz, 2 clocks, WDT enable Typical ICC1 and ICC2 vs.
  • Page 47 EM78P156N OTP ROM Typical ICC3 and ICC4 vs. Temperature Typ ICC4 Typ ICC3 Temperature (¢J ) Fig. 28 Typical operating current (ICC3 and ICC4) vs. Temperature Maximum ICC3 and ICC4 vs. Temperature Max ICC4 Max ICC3 Temperature (¢J ) Fig. 29 Maximum operating current (ICC3 and ICC4) vs. Temperature This specification is subject to change without prior notice.
  • Page 48 EM78P156N OTP ROM Two conditions exist with the Standby Current ISB1 and ISB2. These conditions are as follows: ISB1: VDD=5V, WDT disable ISB2: VDD=5V, WDT enable Typical ISB1 and ISB2 vs. Temperature Typ ISB2 Typ ISB1 Temperature (¢J ) Fig. 30 Typical standby current (ISB1 and ISB2) vs. Temperature Maximum ISB1 and ISB2 vs.
  • Page 49 EM78P156N OTP ROM Fig. 32 Operating voltage in temperature range from 0¢ J to 70¢ J Fig. 33 Operating voltage in temperature range from -40¢ J to 85¢ J This specification is subject to change without prior notice. 07.29.2004 (V1.2)
  • Page 50 EM78P156N OTP ROM EM78P156N-J HXT V-I 2.25 1.75 1.25 0.75 0.25 Voltag e(V) Fig. 34 Operating current range (based on high Freq. @ =25¢ J ) vs. Voltage EM78P156N-J LXT V-I Voltage(V) Fig. 35 Operating current range (based on low Freq. @ =25¢ J ) vs. Voltage This specification is subject to change without prior notice.
  • Page 51 EM78P156N OTP ROM EM78P156N-G HXT V-I 2.25 1.75 1.25 0.75 0.25 Voltage(V) Fig. 36 Operating current range (based on high Freq. @ =25¢ J ) vs. Voltage EM78P156N-G LXT V-I Voltage(V) Fig. 37 Operating current range (based on high Freq. @ =25¢ J ) vs. Voltage This specification is subject to change without prior notice.

  • Page 52: Package Types

    EM78P156N OTP ROM APPENDIX Package Types: OTP MCU Package Type Pin Count Package Size EM78P156NP 300 mil EM78P156NM 300 mil EM78156NAS SSOP 209 mil EM78156NKM SSOP 209 mil This specification is subject to change without prior notice. 07.29.2004 (V1.2)

  • Page 53: Package Information

    EM78P156N OTP ROM Package Information 18-Lead Plastic Dual in line (PDIP) ¡ X 300 mil This specification is subject to change without prior notice. 07.29.2004 (V1.2)
  • Page 54 EM78P156N OTP ROM 18-Lead Plastic Small Outline (SOP) ¡ X 300 mil This specification is subject to change without prior notice. 07.29.2004 (V1.2)
  • Page 55 EM78P156N OTP ROM 20-Lead Plastic Small Outline (SSOP) ¡ X 209 mil This specification is subject to change without prior notice. 07.29.2004 (V1.2)
  • Page 56 EM78P156N OTP ROM Quality Assurance And Reliability Test category Test conditions Remarks Solder temperature=245±5 ¢ J ¡ A for 5 seconds up to th e sto pper Solderability usi n g a rosi n-type fl u x Pre-condition Step1: TCT ¡ A 65¢ J (15mins)~150¢ J (15mins)¡ A 10 cycles For SMD IC(such as SOP¡...

  • Page 57: Address Trap Detect

    EM78P156N OTP ROM /Rese Internal Tpor Power Symbol Parameter Condition Min. Typ. Max. Unit Tpor Power on reset time Vdd = 5V, -40¢ J to 85¢ J 10.5 16.8 Vdd Voltage drop time Vdd = 5V, -40¢ J to 85¢ J Vdd Voltage rise time Vdd = 5V, -40¢...

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