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Preliminary Information
PCKR
PPFRi
PPFT
PPFT
Note: For the PPFT depicted above, PPFP = HIGH. If PPFP is LOW, the PPFT line will have negative pulse polarity.
STo (4 Mbps)
Ch. 3 Bit 1
C4/8R1 or C4/8R2
(ST-BUS Mode)
PCKT
PPFTo
PDo7-0
Note: The MT90840 will correct phase relation in TM1 by moving PPFTo (by moving F0o in TM2 andTM3).
Figure 30 - Phase Variation Between C4/8R1 & C4/8R2 and PCKT Inputs for TM1 Operation
STo (4 Mbps)
Ch. 61 Bit 2
SPCKo
(ST-BUS Mode)
PCKR
PPFRi
PDi7-0
Note: The MT90840 will correct phase relation in TM2 by inverting SPCKo w.r.t. C4/8R1 or C4/8R2.
Figure 31 - Phase Variation Between C4 and PCKR Inputs for TM2 Operation
TCP = 0
TCP = 1
Figure 29 - Parallel Port in Timing Mode 4
Ch. 3 Bit 0 (4 Mbps)
t
pv
n-2
Ch. 61 Bit 1 (4 Mbps)
t
pv
n-1
n
0
t
df
t
df
t
pv
n-1
n
0
t
pv
1
2
MT90840
Ch. 4 Bit 7
1
2
Ch. 61 Bit 0
2-273
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