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Figure 7. Memory channel interface layout
The following table lists the DIMM connectors on each memory channel.
Table 7. Connectors on each memory channel
Memory channel
Channel 0
Channel 1
Channel 2 (not used in memory mirroring)
The following illustration shows the memory connector layout that is associated with
each microprocessor. For example, DIMM connectors 9, 10, 11, 12, 13, 14, 15, and
16 (DIMM connectors are shown underneath the boxes) are associated with
microprocessor 2 socket (CPU2), and DIMM connectors 1, 2, 3, 4, 5, 6, 7, and 8
are associated with microprocessor 1 socket (CPU1). The numbers within the boxes
indicate the installation sequence of the DIMM pairs. For example, the first DIMM
pair (indicated within the boxes by 1s) should be installed in DIMM connectors 3
and 6, which are associated with microprocessor 1 (CPU1).
Note: You can install DIMMs for microprocessor 2 as soon as you install
microprocessor 2; you do not have to wait until all of the DIMM connectors for
microprocessor 1 are filled.
The following table lists the installation sequence for installing DIMMs in
memory-mirroring mode.
Table 8. Memory-mirroring mode DIMM population sequence
DIMMs
First pair of DIMMs
DIMM connectors
1, 2, 3, 9, 10, 11
4, 5, 6, 12, 13, 14
7, 8, 15, 16
Number of installed
microprocessors
1
Chapter 2. Installing optional devices
DIMM connector
3, 6
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