Interface Control - Oki ML421 Maintenance Manual

2.1.4 Interface Control

(1) Parallel Interface
The parallel data input from the host to the interfaced LSI is latched to its internal register
at the falling edge of the STROBE-N signal.
At the same time, the LSI sets the BUSY signal to the high level to inform the host that
the data is being processed, and outputs the RXD signal to inform the MPU of data
reception. The data is read upon receiving the RD-N signal from the MPU.
When the data processing ends, the BUSY signal is set to off and the ACK-N signal in
sent to request the next data. When reception is impossible because the buffer is full, the
BUSY signal is sent to request stopping of data transmission.
MPU
Receive Data
1 to 8
STROBE-N
BUSY
ACK-N
RXD-N
* The STROBE-based timing for the BUSY signal is adjustable from the Maintenance
menu.
ACK signal timing and BUSY signal timing can be adjusted from the Maintenance menu.
42113901 Rev.2
A/D bus
RXD-N
P16
500ns max.
LSI
Receive Data
NBSY
ACK
NSTB
NRXD
2~8µs
Oki Data CONFIDENTIAL
CN1
BUSY
ACK-N
STROBE-N
17 /