Real-Time Clock, Cmos Sram, And Battery; I/O Controller - Intel D845GLLY Using Manual

Technical Product Specification for Intel Desktop Boards using the Intel 845GL Chipset
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices.
The BIOS supports 48-bit Logical Block Addressing (LBA) and Extended Cylinder Head Sector
(ECHS) translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The Desktop Boards support Laser Servo (LS-120) diskette technology through the IDE interfaces.
The BIOS supports booting from an LS-120 drive.
✏
NOTE
The BIOS will always recognize an LS-120 drive as an ATAPI floppy drive. To ensure correct
operation, do not configure the drive as a hard disk drive.

1.7.4 Real-Time Clock, CMOS SRAM, and Battery

A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
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INTEGRATOR'S NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.

1.8 I/O Controller

The I/O controller (SMSC LPC47M102) provides the following features:
•
Two serial ports
•
One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
•
Serial IRQ interface compatible with serialized IRQ support for PCI systems
•
PS/2-style mouse and keyboard interfaces
•
Interface for one 1.2 MB or 1.44 MB diskette drive
•
Intelligent power management, including a programmable wake-up event interface
•
Two fan tachometer inputs
The BIOS Setup program provides configuration options for the I/O controller.
For information about
SMSC LPC47M102 I/O controller
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Refer to
http://www.smsc.com