Pci Interrupt Routing Map - Intel BOXD850EMD2L - 850E 478PIN MAX-2GB UATX 3PCI Specifications

Intel Desktop Board D850EMD2/D850EMV2 Technical Product Specification
Table 20.

PCI Interrupt Routing Map

PCI Interrupt Source
AGP connector
ICH2 USB controller #1
SMBus controller
ICH2 USB controller #2
ICH2 Audio / Modem
ICH2 LAN
(Note 1)
OHCI controller 1
(Note 1)
OHCI controller 2
(Note 1)
EHCI controller
PCI Bus Connector 1
PCI Bus Connector 2
PCI Bus Connector 3
PCI Bus Connector 4
PCI Bus Connector 5
Notes:
1. USB 2.0 option only
2. Desktop Board D850EMV2 only
✏
NOTE
In PIC mode, the ICH2 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 19 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
52
PIRQF
INTA
INTD
INTC
(Note 2)
INTB
(Note 2)
INTA
ICH2 PIRQ Signal Name
PIRQG PIRQH PIRQB
INTB
INTB
INTC
INTB
INTB INTC INTD
INTA INTB INTC
INTD INTA INTB
INTC INTD INTA
INTB INTC INTD
Other
INTA to PIRQA
INTD to PIRQD
INTA to PIRQE
INTD to PIRQA
INTC to PIRQB
INTH to PIRQC