Texas Instruments DS250DF410 Manual

DS250DF410 25 Gbps Multi-Rate 4-Channel Retimer
1 Features
• Quad-channel multi-rate retimer with integrated
1
signal conditioning
• All channels lock independently from 20.2752 to
25.8 Gbps (including sub-rates such as 10.3125
Gbps, 12.5 Gbps, and more)
• Ultra-low latency: <500 ps typical for 25.78125-
Gbps data rate
• Single power supply, no low-jitter reference clock
required, and minimal supply decoupling to reduce
board routing complexity and BOM cost
• Integrated 2×2 cross point
• Adaptive continuous time linear equalizer (CTLE)
• Adaptive decision feedback equalizer (DFE)
• Low-jitter transmitter with 3-Tap FIR filter
• Combined equalization supporting 35+ dB channel
loss at 12.9 GHz
• Adjustable transmit amplitude: 205 mVppd to
1225 mVppd (Typical)
• On-chip eye opening monitor (EOM), PRBS
pattern checker/generator
• Supports JTAG/AC-JTAG boundary scan
• Small 6-mm × 6-mm BGA package with easy flow-
through routing
SMBus
Slave mode
25 MHz
SMBus Slave
2.5V
1 F
(2x)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Simplified Schematic
RX0P
RX CDR
RX0N
. . .
. . .
. .
.
RX3P
CDR
RX
RX3N
VDD
1 NŸ
EN_SMB
NC_TEST
CAL_CLK_IN
READ_EN_N
mode
VDD
0.1 F
(4x)
(1) SMBus signals need to be pulled up elsewhere in the system.
Tools &
Software
SNLS456D – MARCH 2016 – REVISED OCTOBER 2019
2 Applications
• Jitter cleaning for front-port optical
• Active cable assemblies
• Backplane/mid-plane reach extension
• IEEE802.3bj 100GbE, Infiniband EDR, and OIF-
CEI-25G-LR/MR/SR/VSR electrical interfaces
• SFP28, QSFP28, CFP2/CFP4, CDFP
3 Description
The DS250DF410 is a four-channel multi-rate retimer
with integrated signal conditioning. It is used to
extend the reach and robustness of long, lossy,
crosstalk-impaired
achieving a bit error rate (BER) of 10
Each channel of the DS250DF410 independently
locks to serial data rates in a continuous range from
20.2752 Gbps to 25.8 Gbps or to any supported sub-
rate (÷2 and ÷4), including key data rates such as
10.3125 Gbps and 12.5 Gbps, which allows the
DS250DF410 to support individual lane Forward Error
Correction (FEC) pass-through.
Device Information
PART NUMBER
DS250DF410 ABM (101)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TX0P
TX
TX0N
. .
.
.
.
.
TX3P
TX
TX3N
2.5V or
3.3V
INT_N
(1)
SDA
(1)
SDC
ADDR0
ADDR1
CAL_CLK_OUT
ALL_DONE_N
Float for SMBus Slave
mode, or connect to next
GHYLFH¶V 5($'_EN_N for
GND
SMBus Master mode
Support &
Community
DS250DF410
high-speed serial links
-15
or less.
(1)
PACKAGE BODY SIZE (NOM)
6.00 mm × 6.00 mm
To other open-drain
interrupt pins
To system
SMBus
Address straps
(pull-up, pull-
down, or float)
7R QH[W GHYLFH¶V
CAL_CLK_IN
while