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Diamond Systems DIAMOND-MM-48-AT MM-48-AT User Manual

Autocalibrating 16-bit analog i/o pc/104 module with relays and optocouplers
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DIAMOND-MM-48-AT
Autocalibrating 16-bit Analog I/O PC/104 Module
With Relays and Optocouplers
User Manual V1.01
 Copyright 2004
Diamond Systems Corporation
8430-D Central Ave.
Newark, CA 94560
Tel (510) 456-7800
www.diamondsystems.com

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Summary of Contents for Diamond Systems DIAMOND-MM-48-AT MM-48-AT

  • Page 1 DIAMOND-MM-48-AT Autocalibrating 16-bit Analog I/O PC/104 Module With Relays and Optocouplers User Manual V1.01  Copyright 2004 Diamond Systems Corporation 8430-D Central Ave. Newark, CA 94560 Tel (510) 456-7800 www.diamondsystems.com...

  • Page 2: Table Of Contents

    TABLE OF CONTENTS DESCRIPTION... 3 DIAMOND-MM-48-AT BOARD DRAWING ... 4 I/O HEADER PINOUT AND PIN DESCRIPTION... 5 BOARD CONFIGURATION ... 7 I/O MAP ... 9 REGISTER DEFINITIONS... 11 ANALOG INPUT RANGES AND RESOLUTION ... 27 PERFORMING AN A/D CONVERSION... 28 A/D SCAN, FIFO, AND INTERRUPT OPERATION ...

  • Page 3: Board

    DIAMOND-MM-48-AT 1. DESCRIPTION Diamond-MM-48-AT (DMM-48-AT) is a PC/104 expansion board offering embedded systems designers a full feature set of analog and digital I/O capabilities. It is designed to be used in any PC-compatible embedded computer with a PC/104 (ISA-bus) expansion connector. DMM-48-AT offers reduced embedded system size and weight, as well as lower cost, by providing more functionality on one board than other data acquisition boards.

  • Page 4: Board

    2. DIAMOND-MM-48-AT BOARD DRAWING Feature descriptions PC/104 8-bit bus connector PC/104 16-bit bus connector Analog and digital I/O connector Relay and optocoupler I/O connector Configuration jumper block Factory use only (used in factory calibration process) +/-5 input range selection (bipolar model only) Diamond-MM-48-AT User Manual V1.01 Page 4...

  • Page 5: I/O Header Pinout And Pin Description

    3. I/O HEADER PINOUT AND PIN DESCRIPTION Diamond-MM-48-AT provides two I/O headers. J3, located on the right side of the board, is a 40-pin header that includes the analog in, analog out, and logic-level digital I/O features. Pin 1 is the upper left pin and is marked on the board. J4, located on the left side of the baord, is a 34-pin header with the relay and optocoupler features.
  • Page 6 J4: Relays and Optocouplers Opto 0- Opto 1- Opto 2- Opto 3- No connection Relay 0 NO Relay 0 C Relay 1 NC Relay 2 NO Relay 2 C Relay 3 NC Relay 4 NO Relay 4 C Relay 5 NC Relay 6 NO Relay 6 C Relay 7 NC...

  • Page 7: Board Configuration

    4. BOARD CONFIGURATION Refer to the Drawing of Diamond-MM-48-AT on page 4 for locations of the configuration items mentioned here. All configuration except the A/D input range is done with jumper block 4.1 Base Address Each board in your system must have a unique I/O address range. The first address in this range is called the base address.
  • Page 8 board should have the pull-down resistor enabled with a jumper in the R location. The other boards should have the R jumper removed to disable their pull-down resistors. 4.3 Optocoupler Polarity The 4 optocouplers may be configured for either direct or inverted polarity with the POL position on J6.

  • Page 9: I/O Map

    5. I/O MAP 5.1 Overview Diamond-MM-48-AT occupies 16 bytes in I/O memory space. A functional list of these registers is provided below, and detailed register bit definitions are provided on the next page and the following chapter. The information in chapters 5 and 6 is provided to assist in understanding the board’s operation and for use by programmers writing their own driver software.
  • Page 10 5.2 Register Map Bit Assignments A blank location in the Write registers has no function. A blank location in the Read registers has no function and reads back as 0. WRITE operations HIGH3 HIGH2 RELAY7 RELAY6 OEN3 OEN2 CLRT CLRD Page 0: Counter data LSB Page 0: Counter data CSB Page 0: Counter data MSB...

  • Page 11: Register Definitions

    6. REGISTER DEFINITIONS Base + 0 Write D/A LSB Bit No. Name Definitions: DA7-0 D/A bits 7-0; DA0 is the LSB. D/A data is an unsigned 12-bit number ranging from 0 to 4095. Base + 0 Read A/D LSB Bit No. Name Definitions: AD7 –...
  • Page 12 Base + 1 Read A/D MSB Bit No. Name AD15 AD14 Definitions: AD15 – 8 A/D MSB data (bits 15-8 of the 16-bit value). A/D data is a signed 16-bit value ranging from -32768 to 32767. Note: Reading from Base + 0 and Base + 1 result in the same physical operation, reading from the FIFO.
  • Page 13 Base + 3 Read/Write Relay Control Port Bit No. Name RELAY7 RELAY6 These bits control the 8 relays. 0 = off (C connected to NC), 1 = on (C connected to NO). The written value may be read back with true logic. The value on the corresponding output pin is the inverse of the value in this register.
  • Page 14 Base + 5 Write Digital I/O Data Bit No. Name Definitions: DIO3 – 0 Digital I/O output data. Only bits in output mode are affected. Any bit in input mode will ignore data written to this register. Base + 5 Read Digital I/O Data and Edge Status Bit No.
  • Page 15 Base + 7 Write D/A Channel and Control Register Bit No. Name DAUPDT Writing a 1 to this bit updates the D/A chip. All channels with new data written to them since the previous update are updated simultaneously. When a 1 is written to this bit the other bits in the register are ignored.
  • Page 16 Base + 8 Write Command Register Bit No. Name Writing a 1 to any bit in this register causes a command or operation to be executed. Only one bit may be activated (set to 1) at a time. When a 1 is written to any bit, no other bit or related operation is affected.
  • Page 17 Base + 8 Read Status Register Bit No. Name Optocoupler polarity jumper setting; the value indicates the value of an open circuit: Open circuit reads as 1, “high” input reads as 0 Open circuit reads as 0, “high” input reads as 1 ADCH3 - 0 Current A/D channel;...
  • Page 18 Base + 9 Write Configuration Register Bit No. Name CKSEL1 Clock source select for counter/timer 1: External signal Clk0 in I/O connector J3 On-board clock, frequency selected by CKFRQ1 below CKFRQ1 Clock frequency select for counter/timer 1 when CKSEL1 = 0: 100KHz 10MHz CKFRQ0...
  • Page 19 Base + 9 Read Configuration & Status Register Bit No. Name ADBUSY DABUSY ADBUSY A/D chip status: A/D conversion or scan is in progress or A/D input circuit in settling mode A/D is idle Do not attempt to start a new A/D conversion or scan when ADBUSY = 1. DABUSY D/A chip status: D/A conversion is in progress...
  • Page 20 Base + 10 Write FIFO Control Register Bit No. Name PAGE Page number for registers at Base + 12 through Base + 15 Page 0: 82C54 counter/timer access Page 1: Calibration registers FIFOTH FIFO threshold: 0 = 1024 samples (half full), 1 = 256 samples (1/8 full) FIFOEN FIFO enable: Enable FIFO operation;...
  • Page 21 Base + 11 Write Interrupt Control Register Bit No. Name CLRT CLRD CLRT Clear the timer interrupt flip flop. CLRD Clear the digital input interrupt flip flop and reset their edge detect status bits. CLRO Clear the optocoupler input interrupt flip flop and reset their edge detect status bits.
  • Page 22 Base + 11 Read Interrupt Status Register Bit No. Name TINT DINT TINT Timer interrupt status: Timer interrupt pending Timer interrupt not pending DINT Digital interrupt status: Digital input interrupt pending Digital input interrupt not pending OINT Optocoupler input interrupt request status: One or more qualifying edges have occurred on the optocouplers No qualifying edges have occurred AINT...
  • Page 23 Page 0: Counter/Timer Base + 12 Read/Write Counter/Timer D7 - 0 Bit No. Name This register is used for both Counter 0 and Counter 1. It is the LSB for both counters. When writing to this register, an internal load register is loaded. Upon issuing a Load command through Base + 15, the selected counter’s LSB register will be loaded with this value.
  • Page 24 Base + 15 Write Counter/Timer Control Register Bit No. Name CTRNO LATCH This register is used to control the counter/timers. A counter is selected with bit 7, and then a 1 is written to any ONE of bits 6 – 0 to select the desired operation for that counter. The other bits and associated functions are not affected.
  • Page 25 Page 1: Autocalibration Control Registers Base + 12 Read/Write EEPROM / TrimDAC Data Register Bit No. Name D7-0 Calibration data to be read or written to the EEPROM and/or TrimDAC. During EEPROM or TrimDAC write operations, the data written to this register will be written to the selected device.
  • Page 26 Base + 14 Write Calibration Control Register Bit No. Name EE_EN EE_RW This register is used to initiate various commands related to autocalibration. More detailed information on autocalibration may be found elsewhere in this manual. EE_EN EEPROM Enable. Writing a 1 to this bit will initiate a transfer to/from the EEPROM as indicated by the EE_RW bit.

  • Page 27: Analog Input Ranges And Resolution

    7. ANALOG INPUT RANGES AND RESOLUTION 7.1 Resolution Diamond-MM-48-AT uses a 16-bit A/D converter. This means that the analog input voltage can be measured to the precision of a 16-bit binary number. The maximum value of a 16-bit binary number is 2 - 1, or 65535, so the full range of numerical values that you can get from a Diamond-MM-48-AT analog input channel is 0 - 65535.

  • Page 28: Performing An A/D Conversion

    8. PERFORMING AN A/D CONVERSION This chapter describes the steps involved in performing an A/D conversion on a selected input channel using direct programming (not with the driver software). This describes the basic operation of a single A/D conversion without interrupts. For a more complete description including interrupts and all register control bits, see chapter 9.
  • Page 29 8.3 Trigger an A/D conversion on the current channel After the above steps are completed, start the A/D conversion by writing a 1 to the ADSTART bit in Base + 8. This write operation only triggers the A/D if the CLKEN bit is 0 to disable hardware triggering and enable software triggering.
  • Page 30 8.6 Convert the numerical data to a meaningful value Once you have the A/D code, you need to convert it to a meaningful value. The first step is to convert it back to the actual measured voltage. Afterwards you may need to convert the voltage to some other engineering units (for example, the voltage may come from a temperature sensor, and then you would need to convert the voltage to the corresponding temperature according to the temperature sensor’s characteristics).

  • Page 31: A/D Scan, Fifo, And Interrupt Operation

    9. A/D SCAN, FIFO, AND INTERRUPT OPERATION This chapter describes in detail the interrupt performance of the A/D circuit under all conditions. The control bits FIFOEN (FIFO enable), FIFOTH (FIFO threshold), SCANEN (scan enable), SCNINT (scan interval), and AINTE (A/D interrupt enable) determine the behavior of the board during A/D conversions with interrupts.
  • Page 32 FIFO Operation After each A/D conversion is completed, the A/D data is stored in the FIFO. The data is inserted in LSB / MSB sequence. The FIFO holds 4096 bytes, or 2048 samples. It has several flags that indicate its state: Empty flag 1 when the FIFO is empty and 0 otherwise.
  • Page 33 Guidelines for Selecting FIFO Use (FIFOEN and FIFOTH) The below data is a guideline for interrupt use that will work in typical applications and systems. Each application’s optimum performance will be based on the processor speed, operating system, sampling method, and need to obtain data as soon as possible. Sample rate Rate <...

  • Page 34: Analog Output Overview

    10. ANALOG OUTPUT OVERVIEW 10.1 Description Diamond-MM-48-AT uses an 8-channel 12-bit D/A converter (DAC) to provide 8 analog voltage outputs. A 12-bit DAC can generate output voltages with the precision of a 12-bit binary number. The maximum value of a 12-bit binary number is 2 range of numerical values that you can write to the analog outputs on Diamond-MM-48-AT is 0 - 4095.

  • Page 35: Generating An Analog Output

    11. GENERATING AN ANALOG OUTPUT This chapter describes the steps involved in generating an analog output (also called performing a D/A conversion) on a selected output channel using direct programming (not with the driver software). There are three steps involved in performing a D/A conversion: 1.

  • Page 36: Autocalibration Operation

    12. AUTOCALIBRATION OPERATION Diamond-MM-48-AT includes a sophisticated autocalibration circuit that manages the calibration of both the A/D and the D/A circuitry. Operation is as follows. 12.1 Reference Voltages The board contains a precision reference voltage chip that is selected for high stability over time and temperature.

  • Page 37: Digital I/O Operation

    13. DIGITAL I/O OPERATION Diamond-MM-48-AT contains a 4-bit digital I/O port with programmable direction and edge detection capability. The digital I/O lines are located at pins 35 through 38 on the I/O header J3. They are CMOS / TTL compatible. Each line can drive up to -6mA in a logic high state or sink up to 8mA in a logic low state.

  • Page 38: Optocoupler Operation

    14. OPTOCOUPLER OPERATION Diamond-MM-48-AT contains programmable edge detection capability, and interrupt capability on edge detection. These lines accept inputs up to 28VDC. The transition between logic 0 and 1 occurs at approximately 1.5VDC and is guaranteed to be 1 at 3VDC or above. The POL jumper on jumper block J6 selects the logic polarity of the 4 register bits OPTO3-0.
  • Page 39 Tables describing behavior of POL jumper, opto inputs, and edge detection The POL bit is the inverse of the POL pin. Non-inverted inputs means the opto bit is reported as the inverse of the corresponding input pin, since the opto circuit has a built-in inversion. Edge detection always operates with respect to the actual input voltage, not the logic.

  • Page 40: Relay Operation

    15. RELAY OPERATION Diamond-MM-48-AT contains 8 relays with SPDT (form C) configuration. The relays are Omron type G6K or equivalent. Note that these relays are actually DPDT (double pole) relays. The two poles are connected in parallel for lower on resistance and greater current carrying capacity.

  • Page 41: Counter/Timer Operation

    16. COUNTER/TIMER OPERATION Diamond-MM-48-AT contains two counter/timers that provide various timing functions, including A/D timing and user functions. These counters are integrated into the system controller FPGA. The user interface consists of a 24-bit data register in Base + 12 through Base + 14, an 8-bit command register in Base + 15, and control bits in several other registers.
  • Page 42 16.3 Command Sequences Diamond Systems provides Universal Driver software to control the counter/timers on Diamond-MM-48-AT. The information here is intended as a guide for programmers writing their own code in place of the driver and also to give a better understanding of the counter/timer operation.
  • Page 43 Reading a counter a. Latch the counter: Counter 0 outp(base+15,0x40); b. Read the data: The value is returned in 3 bytes, low, middle, and high (2 bytes for counter 1) Counter 0 low=inp(base+12); middle=inp(base+13); high=inp(base+14); c. Assemble the bytes into the complete counter value: Counter 0 val = high * 2^16 + middle * 2^8 + low;...

  • Page 44: Specifications

    17. SPECIFICATIONS Analog Inputs No. of inputs A/D resolution Input ranges Input bias current Maximum input voltage Overvoltage protection Nonlinearity Max conversion rate Conversion trigger Autocalibration Circuits calibrated A/D error D/A error Analog Outputs No. of outputs D/A resolution Output range Output current Settling time Integral nonlinearity...

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