Integrated Peripherals - JETWAY 603TCR4A User Manual

M/b for socket 370 pentium iii processor
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PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles.
Select Enabled to support compliance with PCI specification version 2.1. The settings are:
Enabled and Disabled.

3-7 Integrated Peripherals

CMOS Setup Utility – Copyright(C) 1984-2002 Award Software
> OnChip IDE Function
> OnChip DEVICE Function
> OnChip SUPERIO Function
Init Display First
↑↓→← :Move
Enter:Select
F5:Previous Values
OnChip IDE Function
Please refer to section 3-7-1
OnChip DEVICE Function
Please refer to section 3-7-2
OnChip SUPERIO Function
Please refer to section 3-7-3
Init Display First
This item allows you to decide to activate whether PCI Slot or AGP VGA first. The
settings are: PCI Slot, AGP Slot.
Integrated Peripherals
[Press Enter]
Press Enter
Press Enter
PCI Slot
+/-/PU/PD:Value
F10:Save
F6:Optimized Defaults
27
Item Help
Menu Level >
ESC:Exit
F1:General Help
F7:Standard Defaults

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