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Quectel SG560D Series Hardware Design

Quectel SG560D Series Hardware Design

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SG560D Series
Hardware Design
Smart Module Series
Version: 2.0
Date: 2024-03-05
Status: Released

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Summary of Contents for Quectel SG560D Series

  • Page 1 SG560D Series Hardware Design Smart Module Series Version: 2.0 Date: 2024-03-05 Status: Released...

  • Page 2: Legal Notices

    Smart Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai...

  • Page 3: Third-Party Rights

    Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects.

  • Page 4: Safety Information

    Manufacturers of the terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.

  • Page 5: About The Document

    Smart Module Series About the Document Revision History Version Date Author Description Xiaomeng GUO/ 2022-05-13 Creation of the document Chris ZHANG Xiaomeng GUO/ 2022-06-22 First official release Chris ZHANG Added n3, n5, and n8 for SG560D-CN (Table 3, Table 6, Table 36, Table 38, Table 42 and Table 56).
  • Page 6 Smart Module Series Updated applicable modules Cheney ZHANG/ SG560D-CE, SG560D-EM, SG560D-NA and Waller GUO/ SG560D-WF. 2024-03-05 Andy ZHANG/ Updated the reference circuit for GNSS Leon GONG passive antenna and GNSS active antenna (Figure 29 and Figure 30). SG560D_Series_Hardware_Design 5 / 149...

  • Page 7: Table Of Contents

    Smart Module Series Contents Safety Information ............... 3 About the Document ............... 4 Contents ................. 6 Table Index ................9 Figure Index ................11 Introduction ................ 13 1.1. Special Mark ..........................13 Product Overview ..............14 2.1. Frequency Bands and Functions ....................15 2.2.
  • Page 8 Smart Module Series 4.11. LCM Interface ..........................73 4.12. Touch Panel Interface ....................... 75 4.13. Camera Interfaces........................76 4.13.1. MIPI Design Considerations ..................81 4.14. Sensor Interfaces ........................84 4.15. Forced Download Interface ....................... 85 4.16. PCIe Interface ........................... 85 4.17.
  • Page 9 Smart Module Series 8.3. Packaging Specification ......................136 8.3.1. Injection Tray ........................ 136 8.3.2. Packaging Process ...................... 137 Appendix References ..............138 SG560D_Series_Hardware_Design 8 / 149...
  • Page 10 Smart Module Series Table Index Table 1: Special Marks ..........................13 Table 2: Brief Introduction of the Module ....................14 Table 3: Wireless Network Type ......................... 15 Table 4: Key Features ..........................16 Table 5: I/O Parameters Definition ......................23 Table 6: Pin Description ..........................
  • Page 11 Smart Module Series Table 42: Tx Power of SG560D-CE ......................92 Table 43: Tx Power of SG560D-EM ......................93 Table 44: Tx Power of SG560D-NA ......................93 Table 45: Conducted RF Rx Sensitivity of SG560D-CE (Unit:dBm) ............94 Table 46: Conducted RF Rx Sensitivity of SG560D-EM (Unit:dBm) ............95 Table 47: Conducted RF Rx Sensitivity of SG560D-NA (Unit: dBm) ............
  • Page 12 Smart Module Series Figure Index Figure 1: Functional Diagram ........................21 Figure 2: Application Block Diagram ......................21 Figure 3: Pin Assignment ........................... 22 Figure 4: Reference Design for Battery Charging Circuit ................45 Figure 5: Reference Design for Power Supply ..................46 Figure 6: Power Supply Limits During Burst Transmission ................
  • Page 13 Smart Module Series Figure 42: Recommended Footprint ......................131 Figure 43: Top & Bottom Views of the Module ..................132 Figure 44: Recommended Reflow Soldering Thermal Profile ..............134 Figure 45: Injection Tray Dimension Drawing (Unit: mm) ................ 136 Figure 46: Packaging Process ......................... 137 SG560D_Series_Hardware_Design 12 / 149...

  • Page 14: Introduction

    Smart Module Series Introduction This document defines the SG560D series module and describes its air interfaces and hardware interfaces which are connected to your applications. With this document, you can quickly understand module interface specifications, electrical and mechanical details, as well as other related information of the module. The document, coupled with application notes and user guides, makes it easy to design and set up mobile applications with the module.

  • Page 15: Product Overview

    Adreno™ 643 GPU, abundant GPIO interfaces as well as external audio codec. With these, the module is engineered to meet the demanding requirements in M2M applications. Related information and details are listed in the table below: Table 2: Brief Introduction of the Module SG560D Series Packaging Pin Number Dimensions (42.5 ±...

  • Page 16: Frequency Bands And Functions

    Smart Module Series 2.1. Frequency Bands and Functions Table 3: Wireless Network Type Wireless Network Type SG560D-CE SG560D-EM SG560D-NA SG560D-WF n1/n3/n5/n7/n8/n20/n28/n38/n40/ n2/n5/n7/n12/n13/n14/n25/n26/ 5G NR NSA n41/n78/n79 n41/n77/n78/n79 n30/n38/n41/n48/n66/n70/n71/n77/n78 n1/n3/n5/n8/n28/n41/n78/ n1/n3/n5/n7/n8/n20/n28/n38/n40/n41/ n2/n5/n7/n12/n13/n14/n25/n26/n29/ 5G NR SA n78/n79 n30/n38/n41/n48/n66/n70/n71/n77/n78 B1/B2/B3/B4/B5/B7/B8/B12/B17/B18/ B2/B4/B5/B7/B12/B13/B14/B17/B25/ LTE-FDD B1/B3/B5/B8 B19/B20/B26/B28/B32 B26/B29/B30/B66/B71 LTE-TDD...

  • Page 17: Key Features

    Smart Module Series 2.2. Key Features Table 4: Key Features Parameter Details Customized octa-core 64-bit ARMv8-compliant Kryo 670 CPU with 2 MB L3 cache ⚫ 1 × Kryo Gold Plus (high performance) core @ 2.7 GHz with 256 KB Application Processor L2 cache ⚫...
  • Page 18 Smart Module Series 60 fps encoding or 4K @ 30 fps decoding + 1080P @ 30 fps encoding ⚫ EVRC, EVRC-B, EVRC-WB, G.711, G.729, PCM, EVS ⚫ Audio Codec GSM-FR, GSM-EFR, GSM-HR ⚫ AMR-NB, AMR-WB, QCELP Audio Interfaces Three digital microphone inputs ⚫...
  • Page 19 Smart Module Series Supports up to ten SPI interfaces, one of them is default configuration and nine of them can be multiplexed from other interfaces ⚫ SPI Interfaces The default SPI supports master mode only ⚫ For details about nine SPI interfaces that can be multiplexed from other interfaces, see Table 23 Supports up to sixteen I2C interfaces ⚫...
  • Page 20 Smart Module Series SG560D-CE: n1/n41/n78/n79 SG560D-EM: n1/n3/n7/n38/n40/n41/n77/n78/n79 SG560D-NA: n2/n7/n25/n30/n38/n41/n48/n66/n70/n77/n78 ⚫ Supports SCS 15 kHz and 30 kHz ⚫ Supports SA and NSA operation modes ⚫ Supports Option 3x, Option 3a, Option 3 and Option 2 ⚫ Maximum transmission rate: SG560D-CE: –...

  • Page 21: Functional Diagram

    Smart Module Series ⚫ Class E2 (26 dBm ± 3 dB) for DCS1800 & PCS1900 8-PSK ⚫ EDGE: Max. 296 kbps (DL)/ 236.8 kbps (UL) ⚫ GPRS: Max. 107 kbps (DL)/ 85.6 kbps (UL) ⚫ Supports Wi-Fi 6E ⚫ Supports AP and STA modes WLAN Features ⚫...
  • Page 22 L1+L5 5x5 ANT SPI/I2C Main UART & ACCEL & ALPS & HALL UART Debug UART communication Connectivity USB 2.0 USB 3.0 Dual SIM DSDS Quectel DMIC Smart Module SG560D CSI2 Codec Infotainment PCIe to PCIe Ethernet PHY WLAN/BT ANT VBAT...

  • Page 23: Pin Assignment

    Smart Module Series 2.4. Pin Assignment The following figure illustrates the pin assignment of the module. VBAT VBAT ANT_GNSS VBAT VBAT VBAT RESERVED FLASH_LED RESERVED ADC1 RESERVED RESERVED CSI0_LN0_ CSI0_CLK CSI0_LN0 ADC2 RESERVED CSI0_CLK CSI0_LN1_ RESERVED CSI0_LN1 GPIO_7 RESERVED CSI0_LN2_ CSI0_LN2 ANT4 CSI0_LN3_...

  • Page 24: Pin Description

    Smart Module Series 2.5. Pin Description The following table shows the DC characteristics and pin descriptions. Table 5: I/O Parameters Definition Type Description Analog Input Analog Input/Output Analog Output Digital Input Digital Input/Output Digital Output Open Drain Power Input Power Input/Output Power Output Table 6: Pin Description Power Supply...
  • Page 25 Smart Module Series When using it, it is recommended to add 1–4.7 μF 3.0 V output power Vnom = 3.0 V LDO7C_3V0 bypass capacitors for sensors and TP max = 600 mA with a total capacitance not exceeding 18.8 μF. When using it, it is recommended to add 1–4 μF bypass...
  • Page 26 Smart Module Series 3.0 V output Vnom = 3.0 V When using them, LDO3C_3V0 (reserved power) max = 150 mA it is recommended to add 1–4 μF bypass capacitors 1.8 V output Vnom = 1.8 V with a total LDO2C_1V8 (reserved power) max = 150 mA capacitance not...
  • Page 27 Smart Module Series VOL_UP Volume up USB Interfaces Pin Name Pin No. Description DC Characteristics Comment USB/charger The maximum insertion detection output current in Vmax = 12.6 V Charging power OTG mode is USB_VBUS 429–432 Vmin = 3.7 V input 1.5 A.
  • Page 28 Smart Module Series USB 3.1 channel 2 USB0_SS2_RX_M SuperSpeed receive (-) Externally connected to Power supply for Vmax =4.5 V USB_VCONN VPH_PWR or E-Mark cables Vmin = 3.0 V dedicated boost converter. When Micro-USB USB Type-C mode is used, this USB0_CC1 detect 1 pin can be used as...
  • Page 29 Smart Module Series Test points must be reserved. Displayport USB0_DP_AUX_P auxiliary channel Displayport USB0_DP_AUX_M auxiliary channel (-) PCIe Interface Pin Name Pin No. Description DC Characteristics Comment PCIe1 reference PCIE1_REFCLK_P clock (+) PCIE1_REFCLK_ PCIe1 reference clock (-) PCIE1_RX0_P PCIe1 recive 0 (+) PCIE1_RX0_M PCIe1 recive 0 (-) Requires...
  • Page 30 Smart Module Series LCD MIPI lane 0 DSI_LN0_N data (-) LCD MIPI lane 1 DSI_LN1_P data (+) LCD MIPI lane 1 DSI_LN1_N data (-) LCD MIPI lane 2 DSI_LN2_P data (+) LCD MIPI lane 2 DSI_LN2_N data (-) LCD MIPI lane 3 DSI_LN3_P data (+) LCD MIPI lane 3...
  • Page 31 Smart Module Series CAM0_RST Reset of camera 0 CSI1_CLK_P MIPI CS1 clock (+) CSI1_CLK_N MIPI CSI1 clock (-) MIPI CSI1 lane 0 CSI1_LN0_P data (+) MIPI CSI1 lane 0 CSI1_LN0_N data (-) MIPI CSI1 lane 1 CSI1_LN1_P Requires data (+) differential MIPI CSI1 lane 1 CSI1_LN1_N...
  • Page 32 Smart Module Series MIPI CSI2 lane 3 CSI2_LN3_N data (-) Master clock of CAM2_MCLK camera 2 1.8 V CAM2_RST Reset of camera 2 CSI3_CLK_P MIPI CSI3 clock (+) CSI3_CLK_N MIPI CSI3 clock (-) MIPI CSI3 lane 0 CSI3_LN0_P data (+) MIPI CSI3 lane 0 CSI3_LN0_N data (-)
  • Page 33 Smart Module Series DOVDD for Vnom = 1.8 V VREG_L6P_1P8 cameras 0, 1, 2 and max = 300 mA Vnom = 2.8 V VREG_L7P_2P8 AVDD for camera 2 max = 300 mA (U)SIM Interfaces Pin Name Pin No. Description DC Characteristics Comment Either 1.8 V or 2.95 V (U)SIM card...
  • Page 34 Smart Module Series the module. When using it, it is recommended to add bypass capacitors with a total capacitance not exceeding 3 μF. Pull it up to USIM2_VDD with USIM2_DATA (U)SIM2 card data an external 20 kΩ resistor. 1.8/2.95 V USIM2_CLK (U)SIM2 card clock USIM2_RST...
  • Page 35 Smart Module Series When using it, it is recommended to add 1–4.7 μF Power supply for Vnom = 2.95 V SD_LDO9C bypass capacitors SD card max = 600 mA with a total capacitance not exceeding 18.8 μF. Only for SD card pull-up.
  • Page 36 Smart Module Series LPI_SENSOR_ I2C clock 1 for interface only I2C1_SCL external sensor supports sensors of aDSP LPI_SENSOR_ I2C data 2 for architecture. I2C2_SDA external sensor LPI_SENSOR_ I2C clock 2 for I2C2_SCL external sensor I2C data of CCI_I2C_SDA2 cameras 2 and 3 I2C clock of CCI_I2C_SCL2 cameras 2 and 3...
  • Page 37 Smart Module Series DMIC Interfaces Pin Name Pin No. Description DC Characteristics Comment LPI digital MIC1 LPI_DMIC1_CLK clock LPI digital MIC1 LPI_DMIC1_DATA data LPI digital MIC2 LPI_DMIC2_CLK clock 1.8 V LPI digital MIC2 LPI_DMIC2_DATA data LPI digital MIC3 LPI_DMIC3_CLK clock LPI digital MIC3 LPI_DMIC3_DATA data...
  • Page 38 Smart Module Series ADC2 ADC3 ADC4 ADC5 PWM Interfaces Pin Name Pin No. Description DC Characteristics Comment PWM2 PWM output 2 1.8 V PWM1 PWM output 1 VPH_PWR Backlight control. RGB Interfaces Pin No. Pin No. Description DC Characteristics Comment RGB_BLU RGB light-blue RGB_GRN...
  • Page 39 Smart Module Series Acceleration/ ACCEL_GYRO_ gyroscope sensor INT2 interrupt 2 Geomagnetic MAG_INT sensor interrupt Light/proximity ALPS_INT sensor interrupt Hall sensor HALL_INT interrupt GPIO Interfaces Pin No. Pin No. Description DC Characteristics Comment GPIO_6 GPIO_7 Wakeup. GPIO_8 GPIO_9 GPIO_12 Wakeup. GPIO_13 Do not pull it up GPIO_14 during startup.
  • Page 40 Smart Module Series GPIO_43 Wakeup. Do not pull up the GPIO_44 GPIO_45 during startup. GPIO_45 GPIO_46 GPIO_47 Wakeup. GPIO_61 GPIO_62 Do not pull it up GPIO_63 during startup. GPIO_68 Wakeup. Do not pull it up GPIO_93 during startup. Wakeup. GPIO_105 GPIO_106 GPIO_107 GPIO_108...
  • Page 41 Smart Module Series MHB TRX0 LTE: LB DRX & MHB TRX WCDMA: LB DRX & MHB TRX GSM: DCS1800/PCS190 0 TRX SG560D-NA: 5G NR: LB DRX & MHB TRX LTE: LB DRX & MHB TRX SG560D-CE: 5G NR: n78/n79 SG560D-EM: 5G NR: n77/n78/n79 TRX0 ANT1...
  • Page 42 Smart Module Series SG560D-NA: 5G NR: MHB PRX MIMO & n77/n78 PRX MIMO LTE: MHB PRX MIMO & B46 DRX & B5 EN-DC PRX SG560D-CE: 5G NR: n1 DRX MIMO & n78/n79 DRX MIMO & n41 PRX MIMO LTE: MHB DRX MIMO SG560D-EM: 5G NR: MHB DRX...
  • Page 43 Smart Module Series SG560D-EM: 5G NR: LB TRX & MHB TX1 + DRX & n77/n78/n79 TX1 + LTE: LB TRX & MHB DRX & B42 WCDMA: LB TRX & MHB DRX GSM: GSM850/EGSM900 SG560D-NA: 5G NR: LB TRX & MHB TX1 + DRX & n77/n78 TX1 + LTE: LB TRX &...

  • Page 44: Evb Kit

    347, 355, 391, 395, 411, 414, 415, 422, 423, 581–591, 608–610, 613–618, 625, 627–636 2.6. EVB Kit To help you develop applications with the module, Quectel supplies an evaluation board (Smart 5G EVB) with accessories to control or test the module. For more details, see document [1]. SG560D_Series_Hardware_Design...

  • Page 45: Operating Characteristics

    Smart Module Series Operating Characteristics 3.1. Power Supply 3.1.1. Power Supply Pins The module provides five VBAT pins, which are dedicated for connection to external power supply. The power supply range of the module is 3.55–4.4 V, and the recommended value is 4.0 V. VPH_PWR is used for powering peripherals.
  • Page 46 Smart Module Series Table 8: Pin Definition of Charging Interface Pin Name Pin No. Description Comment USB/charger insertion detection; The maximum output current USB_VBUS 429–432 Charging power input; in OTG mode is 1.5 A. Power output for OTG device A test point must be reserved. It must be able to provide sufficient current up to 5.0 A.

  • Page 47: Reference Design For Power Supply

    Smart Module Series Mobile devices such as mobile phones and handheld POS systems are powered by batteries. For different batteries, the charging and discharging curves must be modified correspondingly to achieve the best performance. If the thermistor is not available in the battery, or the adapter is utilized for powering the module, then you must connect BAT_THERM to GND via a 100 kΩ...

  • Page 48: Turn On

    Smart Module Series Burst Burst Transmission Transmission Load (A) Power Supply (V) Ripple Drop Figure 6: Power Supply Limits During Burst Transmission To prevent the voltage from dropping below 3.2 V, it is recommended to connect a tantalum capacitor of about 100 µF with low ESR (ESR ≤...
  • Page 49 Smart Module Series The module can be turned on by driving the PWRKEY pin low for at least 1.6 s. PWRKEY is pulled up to 1.8 V internally. It is recommended to use an open drain/collector driver to control PWRKEY. A simple reference circuit is illustrated in the following figure.

  • Page 50: Turn Off/Restart

    Smart Module Series The timing of turning on the module is illustrated in the following figure. VBAT (Typ. 4.0 V) PWRKEY ≥ 1.6 s LDO18B_1V8 Others ACTIVE Figure 10: Turn-on Timing NOTE When the module is turned on for the first time, its turn-on timing may be different from that shown above.

  • Page 51: Vrtc

    Smart Module Series 3.4. VRTC The RTC (Real Time Clock) can be powered by an external power source when the module is powered down and there is no power supply for the VBAT. The external power source can be a capacitor according to application demands.

  • Page 52: Power Output

    Smart Module Series 3.5. Power Output The module supports output of regulated voltages for peripheral circuits. During application, it is recommended to connect a 30 pF and a 10 pF capacitor in parallel to suppress high-frequency noise. Table 10: Pin Definition of Power Suppy Interface Pin Name Pin No.
  • Page 53 Smart Module Series When using it, it is recommended to add 1–4.7 µF bypass LDO8C_1V8 1.8 V output power for sensors capacitors with a total capacitance not exceeding 18.8 µF. When using them, it 3.0 V output LDO3C_3V0 is recommended to (reserved power) add 1–4 µF bypass capacitors with a total...
  • Page 54 Smart Module Series When using them, it VREG_L1P_1P05 DVDD for cameras 1 and 2 is recommended to add bypass capacitors with a total VREG_L2P_1P1 DVDD for cameras 0 and 3 capacitance not exceeding 45.3 µF. VREG_L3P_2P8 AVDD for cameras 1 and 3 When using them, it VREG_L4P_2P9 AVDD for cameras 0...

  • Page 55: Application Interfaces

    Smart Module Series Application Interfaces 4.1. USB Interfaces The module provides two USB interfaces: USB0 and USB1. USB0 complies with USB 3.1 Gen1 and USB 2.0 specifications and supports USB OTG. USB1 complies with USB 2.0 specification and only supports host mode.
  • Page 56 Smart Module Series USB 3.1 channel 1 SuperSpeed USB0_SS1_RX_P receive (+) USB 3.1 channel 1 SuperSpeed USB0_SS1_RX_M receive (-) USB 3.1 channel 2 SuperSpeed USB0_SS2_TX_P transmit (+) USB 3.1 channel 2 SuperSpeed USB0_SS2_TX_M transmit (-) USB 3.1 channel 2 SuperSpeed USB0_SS2_RX_P receive (+) USB 3.1 channel 2 SuperSpeed...

  • Page 57: Usb Type-C Mode

    Smart Module Series 4.1.1.1. USB Type-C Mode A reference circuit of USB Type-C mode of USB0 is shown below. USB Type_C VBUS USB_VBUS USB0_DM USB0_DP USB0_CC1 USB0_CC2 USB_PHY_PS Module SS_DIR_OUT 330 nF USB0 _ SS1 _RX_P RX1+ 330 nF USB0 _ SS1 _RX_M RX1- 220 nF USB0 _ SS1 _TX_P...

  • Page 58: Displayport Mode

    Smart Module Series 4.1.1.3. DisplayPort Mode The module supports DisplayPort 1.4, which is implemented through USB Type-C interface and supports 4-lane interface with a resolution of 4K @ 60 fps. Pin mapping between USB Type-C interface and DisplayPort interface is defined as follows. Table 12: USB Type-C Mode and DisplayPort Mode Pin Mapping Pin Name Pin No.

  • Page 59: Usb1 Interface

    Smart Module Series 4.1.2. USB1 Interface The following table shows the pin definition of USB1 interface. Table 13: Pin Description of USB1 Interface Pin Name Pin No. Description Comment Requires differential impedance of USB1_DP USB1 2.0 differential data (+) 90 Ω. Complies with USB 2.0 specification.

  • Page 60: U)Sim Interfaces

    Smart Module Series To ensure USB performance, follow the following principles while designing the USB interface. ⚫ It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90 Ω. ⚫...
  • Page 61 Smart Module Series recommended to add bypass capacitors with a total capacitance not exceeding 3 µF. Pull it up to USIM1_VDD with an USIM1_DATA (U)SIM1 card data external 20 kΩ resistor. USIM1_CLK (U)SIM1 card clock USIM1_RST (U)SIM1 card reset Active low. Pull it up to 1.8 V externally.
  • Page 62 Smart Module Series If not used, keep it unconnected. Disabled by default, and can be enabled via software configuration. The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector. LDO18B_1V8 (U)SIM Card Connector 100 n F 100K USIM_ VDD USIM_ RST...

  • Page 63: Sd Card Interface

    Smart Module Series To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. ⚫ Place the (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200 mm as possible.
  • Page 64 Smart Module Series Only for SD card pull-up. SD card pull-up When using it, it is recommended to add SD_LDO6C power supply 1–3 µF bypass capacitors with a total capacitance not exceeding 3 µF. A reference circuit for SD card interface is shown below. SD_LDO9C SD_LDO6C LDO18B_1V8...

  • Page 65: Gpio Interfaces

    Smart Module Series Table 17: SD Card Signal Trace Length Inside the Module Pin No. Signal Length (mm) SD_CLK 49.25 SD_CMD 49.16 SD_DATA0 49.51 SD_DATA1 49.80 SD_DATA2 49.47 SD_DATA3 49.63 4.4. GPIO Interfaces The module has abundant GPIO interfaces with power domain of 1.8 V. The pin definition is listed below. Table 18: Pin Definition of GPIO Interfaces Pin Name Pin No.
  • Page 66 Smart Module Series GPIO_18 GPIO_19 Wakeup. GPIO_24 GPIO_32 GPIO_33 GPIO_34 Wakeup. GPIO_35 GPIO_42 GPIO_43 GPIO_44 Wakeup. GPIO_45 GPIO_46 GPIO_47 Wakeup. GPIO_61 GPIO_62 GPIO_63 Do not pull it up during startup. GPIO_68 Wakeup. Do not pull it up during startup; GPIO_93 Wakeup.

  • Page 67: Uart Interfaces

    Smart Module Series 4.5. UART Interfaces The module supports up to eleven UART interfaces. Two of them are default configurations, see Table 19 for details. Nine of them can be multiplexed from other interfaces, see Table 23 for details. Two default UART interfaces are: ⚫...

  • Page 68: I2C Interfaces

    Smart Module Series A level translator and an RS-232 level-shifting chip are recommended to be added between the module and PC, as shown below. 1.8 V 3.3 V VCCA VCCB TXD_3.3V UART_TXD TXD_1.8V DIN1 DOUT1 RTS_3.3V UART_RTS RTS_1.8V DIN2 DOUT2 DIN3 DOUT3 DIN4...

  • Page 69: Spi Interface

    Smart Module Series LPI_SENSOR_I2C1_ I2C data 1 for The sensor I2C interface only external sensor supports sensors of aDSP architecture. LPI_SENSOR_I2C1_ I2C clock 1 for external sensor LPI_SENSOR_I2C2_ I2C data 2 for external sensor LPI_SENSOR_I2C2_ I2C clock 2 for external sensor TP_I2C_SCL TP I2C clock TP_I2C_SDA...

  • Page 70: I2S Interfaces

    Smart Module Series 4.8. I2S Interfaces The module supports up to five I2S interfaces. Two of them are default configurations, see Table 22 for details. Three of them can be multiplexed from other interfaces, see Table 24 for details. Table 22: Pin Definition of I2S Interfaces Pin Name Pin No.
  • Page 71 Smart Module Series I2C0_SCL GPIO_1 UART00_RTS SPI00_MOSI I2C00_SCL PCIE1_RST_N GPIO_2 UART00_TXD SPI00_CLK PCIE1_WAKE_N GPIO_3 UART00_RXD SPI00_CS0 GPIO_8 GPIO_8 I2C02_SDA QUP0-SE2 GPIO_9 GPIO_9 I2C02_SCL GPIO_12 GPIO_12 UART03_CTS SPI03_MISO I2C03_SDA GPIO_13 GPIO_13 UART03_RTS SPI03_MOSI I2C03_SCL QUP0-SE3 GPIO_14 GPIO_14 UART03_TXD SPI03_CLK GPIO_15 GPIO_15 UART03_RXD SPI03_CS0 GPIO_16...
  • Page 72 Smart Module Series GPIO_45 GPIO_45 UART13_RTS SPI13_MOSI I2C13_SCL GPIO_46 GPIO_46 UART13_TXD SPI13_CLK GPIO_47 GPIO_47 UART13_RXD SPI13_CS0 UART_CTS GPIO_48 UART14_CTS SPI14_MISO I2C14_SDA UART_RTS GPIO_49 UART14_RTS SPI14_MOSI I2C14_SCL UART_TXD GPIO_50 UART14_TXD SPI14_CLK QUP1-SE4 UART_RXD GPIO_51 UART14_RXD SPI14_CS0 TP_RST GPIO_55 SPI14_CS1 LCD_RST GPIO_54 SPI14_CS2 NFC_EN* GPIO_38...
  • Page 73 Smart Module Series Table 24: I2S Multiplexing Relationship Multiplex Function Channel Pin No. Pin Name GPIO No. LPI_DMIC1_CLK GPIO_150 LPI_I2S1_SCLK LPI_DMIC1_DATA GPIO_151 LPI_I2S1_WS LPI_DMIC2_CLK GPIO_152 LPI_I2S1_DATA0 LPI_DMIC2_DATA GPIO_153 LPI_I2S1_DATA1 MI2S_MCLK GPIO_96 PRI_MI2S_MCLK MI2S_SCLK GPIO_97 MI2S0_SCLK MI2S_WS GPIO_100 MI2S0_WS MI2S_DATA0 GPIO_98 MI2S0_DATA0 MI2S_DATA1 GPIO_99...

  • Page 74: Adc Interfaces

    Smart Module Series 4.10. ADC Interfaces The module provides six analog-to-digital converter (ADC) interfaces that support up to 15-bit resolution. The pin definition is shown below. Table 25: Pin Definition of ADC Interfaces Pin Name Pin No. Description Comment ADC0 ADC1 ADC2 General-purpose ADC interface...
  • Page 75 Smart Module Series DSI_LN1_N LCD MIPI lane 1 data (-) DSI_LN2_P LCD MIPI lane 2 data (+) DSI_LN2_N LCD MIPI lane 2 data (-) DSI_LN3_P LCD MIPI lane 3 data (+) DSI_LN3_N LCD MIPI lane 3 data (-) LCD_TE LCD tearing effect 1.8 V power domain.

  • Page 76: Touch Panel Interface

    Smart Module Series MIPI are high-speed signal traces. It is recommended to add common-mode chokes in series near the LCM connector to reduce electromagnetic radiation interference. It is recommended to read the LCM ID register through MIPI when compatible design with other displays is required.

  • Page 77: Camera Interfaces

    Smart Module Series A reference design for TP interface is shown below. LDO7C_3V0 LDO18B_1V8 2.2K 2.2K SDA 1.8 V TP_I2C_SDA TP_I2C_SCL SCL 1.8 V RESET 1.8 V TP_RST INT 1.8 V TP_INT 4.7 μF 100 nF Module Figure 24: Reference Circuit for TP Interface 4.13.
  • Page 78 Smart Module Series VREG_L7P_2P8 AVDD for camera 2 CSI0_CLK_P MIPI CSI0 clock (+) CSI0_CLK_N MIPI CSI0 clock (-) CSI0_LN0_P MIPI CSI0 lane 0 data (+) CSI0_LN0_N MIPI CSI0 lane 0 data (-) CSI0_LN1_P MIPI CSI0 lane 1 data (+) Requires differential impedance of 85 Ω.
  • Page 79 Smart Module Series CSI2_CLK_P MIPI CSI2 clock (+) CSI2_CLK_N MIPI CSI2 clock (-) CSI2_LN0_P MIPI CSI2 lane 0 data (+) CSI2_LN0_N MIPI CSI2 lane 0 data (-) CSI2_LN1_P MIPI CSI2 lane 1 data (+) Requires differential impedance of 85 Ω. CSI2_LN1_N MIPI CSI2 lane 1 data (-) CSI2_LN2_P...
  • Page 80 Smart Module Series The following is a reference circuit for dual-camera applications. AFVDD VREG_L5P_2P8 VREG_L4P_2P9 AVDD DVDD VREG_L2P_1P1 CAM0_RST VREG_L6P_1P8 DOVDD GPIO_12 CAM0_MCLK CCI_I2C_SDA0 CCI_I2C_SCL0 CSI0_LN3_P CSI0_LN3_N CSI0_LN2_P CSI0_LN2_N CSI0_LN1_P CSI0_LN1_N CSI0_LN0_P CSI0_LN0_N CSI0_CLK_P AVDD VREG_L3P_2P8 CSI0_CLK_N 2.2K VREG_L1P_1P05 DVDD DOVDD 2.2K CCI_I2C_SDA1...
  • Page 81 Smart Module Series The following is a reference circuit for tri-camera applications. VREG_L5P_2P8 AFVDD AVDD VREG_L4P_2P9 VREG_L2P_1P1 DVDD CAM0_RST VREG_L6P_1P8 DOVDD GPIO_12 CAM0_MCLK CCI_I2C_SDA0 CCI_I2C_SCL0 CSI0_LN3_P CSI0_LN3_N CSI0_LN2_P CSI0_LN2_N CSI0_LN1_P CSI0_LN1_N CSI0_LN0_P CSI0_LN0_N CSI0_CLK_P VREG_L3P_2P8 AVDD CSI0_CLK_N VREG_L1P_1P05 DVDD 2.2K DOVDD 2.2K CCI_I2C_SDA1...

  • Page 82: Mipi Design Considerations

    Smart Module Series 4.13.1. MIPI Design Considerations ⚫ Special attention should be paid to the pin definition of LCM/camera connectors. Ensure that the module and the connectors are correctly connected. ⚫ MIPI are high-speed signal lines, supporting maximum data rate of 2.5 Gbps/lane. The differential impedance should be controlled to 85 Ω.
  • Page 83 Smart Module Series Table 30: Relationship Between DSI Rate and Line Length (D-PHY) Data Rate Cable Length (mm) Cable Insertion Loss (Db) Line Length (mm) 76.2 -0.5 < 280 500 Mbps/Lane 152.4 -1.0 < 210 76.2 -0.7 < 210 750 Mbps/Lane 152.4 -1.15 <...
  • Page 84 Smart Module Series DSI_LN1_P 26.04 DSI_LN2_N 25.64 0.13 DSI_LN2_P 25.77 DSI_LN3_N 25.92 0.01 DSI_LN3_P 25.93 CSI0_CLK_N 45.08 0.01 CSI0_CLK_P 45.09 CSI0_LN0_N 44.98 -0.01 CSI0_LN0_P 44.97 CSI0_LN1_N 45.11 -0.07 CSI0_LN1_P 45.04 CSI0_LN2_N 45.26 -0.04 CSI0_LN2_P 45.22 CSI0_LN3_N 45.09 -0.01 CSI0_LN3_P 45.08 CSI1_CLK_N 41.66 0.03...

  • Page 85: Sensor Interfaces

    Smart Module Series CSI2_LN0_P 40.85 CSI2_LN1_N 40.95 -0.04 CSI2_LN1_P 40.91 CSI2_LN2_N 40.50 0.23 CSI2_LN2_P 40.73 CSI2_LN3_N 41.03 -0.20 CSI2_LN3_P 40.83 CSI3_CLK_N 39.40 -0.15 CSI3_CLK_P 39.25 CSI3_LN0_N 39.31 0.10 CSI3_LN0_P 39.41 CSI3_LN1_N 39.39 -0.04 CSI3_LN1_P 39.35 CSI3_LN2_N 39.39 0.06 CSI3_LN2_P 39.45 CSI3_LN3_N 39.51 -0.12...

  • Page 86: Forced Download Interface

    Smart Module Series MAG_INT Geomagnetic sensor interrupt ALPS_INT Light/proximity sensor interrupt HALL_INT Hall sensor interrupt 4.15. Forced Download Interface USB_BOOT is a forced download interface. Pulling it up to LDO18B_1V8 during power-up will force the module into download mode. This is a forced option when failures such as abnormal start-up or running occur.
  • Page 87 Smart Module Series PCIE1_RX1_P PCIe1 recive 1 (+) PCIE1_RX1_M PCIe1 recive 1 (-) PCIE1_TX0_P PCIe1 transmit 0 (+) PCIE1_TX0_M PCIe1 transmit 0 (-) PCIE1_TX1_P PCIe1 transmit 1 (+) PCIE1_TX1_M PCIe1 transmit 1 (-) PCIE1_RST_N PCIe1 reset PCIE1_CLKREQ_N PCIe1 clock request 1.8 V power domain.

  • Page 88: Nfc Interface

    Smart Module Series 4.17. NFC Interface* The module provides one NFC interface. Table 35: Pin Definition of NFC Interface Pin Name Pin No. Description Comment NFC_CLK NFC clock NFC_CLK_REQ NFC clock request NFC download control NFC_DWL_REQ request NFC_EN NFC enable Internally pulled up by default.

  • Page 89: Rf Specifications

    Smart Module Series RF Specifications Appropriate antenna type and design should be used with matched antenna parameters according to specific application. It is required to perform a comprehensive functional test for the RF design before mass production of terminal products. The entire content of this chapter is provided for illustration only. Analysis, evaluation and determination are still necessary when designing target products.
  • Page 90 Smart Module Series Table 37: Pin Definition of Cellular Network Interfaces of SG560D-EM Pin Name Pin No. Description 5G NR: LB DRX & MHB TRX0 LTE: LB DRX & MHB TRX ANT0 WCDMA: LB DRX & MHB TRX GSM: DCS1800/PCS1900 TRX 5G NR: n77/n78/n79 TRX0 ANT1 LTE: B42 TRX...
  • Page 91 Smart Module Series Table 39: Operating Frequency of SG560D-CE Operating Transmit (MHz) Receive (MHz) LTE-FDD LTE-TDD UMTS 5G NR Frequency IMT (2100) 1920–1980 2110–2170 DCS (1800) 1710–1785 1805–1880 Cell (850) 824–849 869–894 EGSM (950) 880–915 925–960 700 APAC 703–748 758–803 2010–2025 2010–2025 2570–2620...
  • Page 92 Smart Module Series 699–716 729–746 704–716 734–746 815–830 860–875 830–845 875–890 832–862 791–821 814–849 859–894 703–748 758–803 1452–1496 2010–2025 2010–2025 2570–2620 2570–2620 1880–1920 1880–1920 2300–2400 2300–2400 B41/B41-XGP 2496–2690 2496–2690 3400–3600 3400–3600 3300–4200 3300–4200 3300–3800 3300–3800 4400–5000 4400–5000 Table 41: Operating Frequency of SG560D-NA Operating Transmit (MHz) Receive (MHz)

  • Page 93: Transmitting Power

    Smart Module Series 777–787 746–756 788–798 758–768 704–716 734–746 1850–1915 1930–1995 814–849 859–894 717–728 2305–2315 2350–2360 1710–1780 2110–2200 1695–1710 1995–2020 663–698 617–652 2570–2620 2570–2620 B41/B41-XGP 2496–2690 2496–2690 3400–3600 3400–3600 3600–3800 3600–3800 5150–5925 5150–5925 3550–3700 3550–3700 3300–4200 3300–4200 3300–3800 3300–3800 5.1.2. Transmitting Power The following table shows the RF output power of the module.
  • Page 94 Smart Module Series 5G NR HPUE bands 26 dBm +2/-3 dB (Class 2) < -40 dBm (n41/n78/n79) 5G NR Other 5G NR bands 23 dBm ± 2 dB (Class 3) < -40 dBm Table 43: Tx Power of SG560D-EM Mode Frequency Range Max.

  • Page 95: Rx Sensitivity

    Smart Module Series 5.1.3. Rx Sensitivity The following table shows conducted RF receiving sensitivity of the module. Table 45: Conducted RF Rx Sensitivity of SG560D-CE (Unit:dBm) Mode Frequency Primary Diversity SIMO 3GPP (SIMO) WCDMA B1 -109.9 -109.8 -106.7 WCDMA WCDMA B5 -110.7 -113 -104.7...
  • Page 96 Smart Module Series Table 46: Conducted RF Rx Sensitivity of SG560D-EM (Unit:dBm) Mode Frequency Primary Diversity SIMO 3GPP (SIMO) GSM850 -110 -102.4 EGSM900 -109 -102.4 DCS1800 -109 -102.4 PCS1900 -108.5 -102.4 WCDMA B1 -110 -109.5 -106.7 WCDMA B2 -110 -110 -104.7 WCDMA B4 -110...
  • Page 97 Smart Module Series LTE-FDD B28 (10 MHz) -98.5 -98.7 -101.6 -94.8 LTE-FDD B32 (10 MHz) -95.3 LTE-TDD B34 (10 MHz) -97.5 -97.5 -100.5 -96.3 LTE-TDD B38 (10 MHz) -95.5 -101.5 -96.3 LTE-TDD B39 (10 MHz) -97.7 -97.7 -100.7 -96.3 LTE-TDD B40 (10 MHz) -95.5 -101.5 -96.3...
  • Page 98 Smart Module Series LTE-FDD B5 (10 MHz) -98.7 -99.7 -102.1 -94.3 LTE-FDD B7 (10 MHz) -96.3 -96.2 -102.1 -94.3 LTE-FDD B12 (10 MHz) -98.3 -99.1 -101.7 -93.3 LTE-FDD B13 (10 MHz) -98.5 -99.3 -101.9 -93.3 LTE-FDD B14 (10 MHz) -98.1 -99.1 -101.7 -93.3...

  • Page 99: Reference Design Of Cellular Antenna Interfaces

    Smart Module Series 5G NR TDD n38 (40 MHz) 91.3 -90.6 97.3 -93.4 5G NR TDD n41 (100 MHz) -86.6 -91.7 -87.4 5G NR TDD n48 (40 MHz) -92.2 -93.8 -98.4 -92.1 5G NR FDD n66 (20 MHz) -94.3 -94.3 -100.3 5G NR FDD n70 (15 MHz) -96.8...

  • Page 100: Gnss (Optional)

    Smart Module Series 5.2. GNSS (Optional) The module integrates the IZat™ GNSS engine (Gen 9) which supports multiple positioning and navigation systems including GPS, GLONASS, BDS, Galileo, NavIC, QZSS, SBAS. With an embedded LNA, the module provides greatly improved positioning accuracy. 5.2.1.

  • Page 101: Reference Design

    Smart Module Series Cold start @ open sky 33.21 TTFF Warm start @ open sky 22.84 (GNSS) Hot start @ open sky 0.92 Accuracy CEP-50 (GNSS) NOTE Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously).

  • Page 102: Reference Design For Gnss Active Antenna

    Smart Module Series 5.2.3.2. Reference Design for GNSS Active Antenna In any case, it is recommended to use a passive antenna. However, if an active antenna is needed in your application, it is recommended to reserve a π-type attenuation circuit and use a high-performance LDO in the power system design.

  • Page 103: Wi-Fi/Bluetooth

    Smart Module Series 5.3. Wi-Fi/Bluetooth The module provides one shared antenna interface ANT_WIFI/BT to suppport Wi-Fi and Bluetooth functions. The interface impedance is 50 Ω. You can connect external antennas such as PCB antenna, sucker antenna and ceramic antenna to the module via the interface to achieve Wi-Fi and Bluetooth functions.
  • Page 104 Smart Module Series ⚫ Support MCS 0–7 for HT20 and HT40 ⚫ Support MCS 0–8 for VHT20 ⚫ Support MCS 0–9 for VHT40 and VHT80 ⚫ Support MCS 0–13 for HE20, HE40, HE80 and HE160 The following table lists the Wi-Fi transmitting and receiving performance of the module. Table 53: Wi-Fi Transmitting Performance Frequency Standard...
  • Page 105 Smart Module Series 802.11n HT40 MCS7 14 dBm ± 2.5 dB 802.11ac VHT20 MCS0 15 dBm ± 2.5 dB 802.11ac VHT20 MCS8 13 dBm ± 2.5 dB 802.11ac VHT40 MCS0 15 dBm ± 2.5 dB 802.11ac VHT40 MCS9 13 dBm ± 2.5 dB 802.11ac VHT80 MCS0 15 dBm ±...
  • Page 106 Smart Module Series 802.11ax HE40 MCS11 12 dBm ± 2.5 dB 802.11ax HE40 MCS13 10 dBm ± 2.5 dB 802.11ax HE80 MCS0 15 dBm ± 2.5 dB 802.11ax HE80 MCS11 12 dBm ± 2.5 dB 802.11ax HE80 MCS13 10 dBm ± 2.5 dB 802.11ax HE160 MCS0 14 dBm ±...
  • Page 107 Smart Module Series 802.11a 6 Mbps -93 dBm 802.11a 54 Mbps -76 dBm 802.11n HT20 MCS0 -91 dBm 802.11n HT20 MCS7 -73 dBm 802.11n HT40 MCS0 -88 dBm 802.11n HT40 MCS7 -70 dBm 802.11ac VHT20 MCS0 -92 dBm 802.11ac VHT20 MCS8 -70 dBm 802.11ac VHT40...

  • Page 108: Bluetooth Overview

    Smart Module Series 802.11ax HE20 MCS0 -92 dBm 802.11ax HE20 MCS11 -63 dBm 802.11ax HE20 MCS13 -55 dBm 802.11ax HE40 MCS0 -89 dBm 802.11ax HE40 MCS11 -60 dBm 802.11ax HE40 MCS13 -53 dBm 802.11ax HE80 MCS0 -86 dBm 802.11ax HE80 MCS11 -57 dBm 802.11ax HE80...
  • Page 109 Smart Module Series Table 55: Bluetooth Data Rate and Version Version Data Rate Maximum Application Throughput 1 Mbit/s > 80 kbit/s 2.0 + EDR 3 Mbit/s > 80 kbit/s 3.0 + HS 24 Mbit/s Refer to 3.0 + HS 24 Mbit/s Refer to 4.0 LE 48 Mbit/s Refer to 5.0 LE...

  • Page 110: Reference Design

    Smart Module Series 5.3.4. Reference Design A reference circuit design for Wi-Fi/Bluetooth antenna interface is shown as below. C1 and C2 are not mounted and a 0 Ω resistor is mounted on R1 by default. ANT_WIFI/BT Module Figure 31: Reference Circuit for Wi-Fi/Bluetooth Antenna A reference circuit design for Wi-Fi MIMO antenna interface is shown as below.
  • Page 111 Smart Module Series Figure 33: Microstrip Design on a 2-layer PCB Figure 34: Coplanar Waveguide Design on a 2-layer PCB Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) SG560D_Series_Hardware_Design 110 / 149...

  • Page 112: Antenna Installation

    Smart Module Series To ensure RF performance and reliability, follow the principles below in RF layout design: ⚫ Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω. ⚫ The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground.

  • Page 113: Rf Connector Recommendation

    Smart Module Series ⚫ Cable insertion loss: < 1 dB: LB (<1 GHz) < 1.5 dB: MB (1–2.3 GHz) < 2 dB: HB (> 2.3 GHz) ⚫ VSWR: ≤ 2 ⚫ Gain: 1 dBi ⚫ Max Input Power: 50 W ⚫...
  • Page 114 Smart Module Series U.FL-LP series mated plugs listed in the following figure can be used to match the U.FL-R-SMT connector. Figure 38: Specifications of Mated Plugs (Unit: mm) The following figure describes the space factor of mated connector. Figure 39: Space Factor of Mated Connectors (Unit: mm) Please visit http://www.hirose.com for more information.

  • Page 115: Electrical Characteristics And Reliability

    Smart Module Series Electrical Characteristics and Reliability 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 58: Absolute Maximum Ratings Parameter Min. Max.

  • Page 116: Power Consumption

    Smart Module Series Power output for OTG device VRTC Power supply for RTC - 3.25 6.3. Power Consumption Table 60: Power Consumption of SG560D-CE Mode Conditions Typ. Unit μA OFF state Power down WCDMA PF = 64 5.87 WCDMA PF = 128 5.41 WCDMA PF = 256 5.02...
  • Page 117 Smart Module Series 5G NR TDD PF = 32 11.75 5G NR TDD PF = 64 9.23 5G NR TDD PF = 128 7.94 5G NR TDD PF = 256 B1 @ max. power WCDMA voice calls B5 @ max. power B8 @ max.
  • Page 118 Smart Module Series n41 @ max. power 100 MHz, SCS 30 kHz n78 @ max. power 100 MHz, SCS 30 kHz n79 @ max. power 100 MHz, SCS 30 kHz DC_3A_n41A 100 MHz, SCS 30 kHz DC_39A_n41A 100 MHz, SCS 30 kHz DC_1A_n78A 100 MHz, SCS 30 kHz DC_3A_n78A...
  • Page 119 Smart Module Series LTE-FDD PF = 32 8.02 LTE-FDD PF = 64 6.71 LTE-FDD PF = 128 5.80 LTE-FDD PF = 256 5.34 LTE-TDD PF = 32 8.22 LTE-TDD PF = 64 6.93 LTE-TDD PF = 128 6.04 LTE-TDD PF = 256 5.46 5G NR FDD PF = 32 10.95...
  • Page 120 Smart Module Series PCS1900 @ PCL 0 PCS1900 @ PCL 7 PCS1900 @ PCL 15 B1 @ max. power B2 @ max. power B4 @ max. power WCDMA voice calls B5 @ max. power B6 @ max. power B8 @ max. power B19 @ max.
  • Page 121 Smart Module Series LTE-TDD B38 @ max. power LTE-TDD B39 @ max. power LTE-TDD B40 @ max. power LTE-TDD B41 @ max. power LTE-TDD B42 @ max. power B1 (HSDPA) @ max. power B2 (HSDPA) @ max. power B4 (HSDPA) @ max. power WCDMA data transmission B5 (HSDPA) @ max.
  • Page 122 Smart Module Series PCS1900 (2UL/3DL) @ PCL 0 PCS1900 (3UL/2DL) @ PCL 0 PCS1900 (4UL/1DL) @ PCL 0 GSM850 (1UL/4DL) @ PCL 8 GSM850 (2UL/3DL) @ PCL 8 GSM850 (3UL/2DL) @ PCL 8 GSM850 (4UL/1DL) @ PCL 8 EGSM900 (1UL/4DL) @ PCL 8 EGSM900 (2UL/3DL) @ PCL 8 EGSM900 (3UL/2DL) @ PCL 8 EGSM900 (4UL/1DL) @ PCL 8...
  • Page 123 Smart Module Series n28 @ 23 dBm 20 MHz, SCS 15 kHz n38 @ 23 dBm 20 MHz, SCS 30 kHz n40 @ 23 dBm 20 MHz, SCS 30 kHz n41 @ 26 dBm 100 MHz, SCS 30 kHz n77 @ 26 dBm 100 MHz, SCS 30 kHz n78 @ 26 dBm 100 MHz, SCS 30 kHz...
  • Page 124 Smart Module Series LTE-FDD PF = 128 6.11 LTE-FDD PF = 256 5.63 LTE-TDD PF = 32 8.76 LTE-TDD PF = 64 7.22 LTE-TDD PF = 128 6.32 LTE-TDD PF = 256 5.86 5G NR FDD PF = 32 12.01 5G NR FDD PF = 64 9.18 5G NR FDD PF = 128...
  • Page 125 Smart Module Series LTE-FDD B66 @ max. power LTE-FDD B71 @ max. power LTE-TDD B38 @ max. power LTE-TDD B41 @ max. power LTE-TDD B42 @ max. power LTE-TDD B43 @ max. power LTE-TDD B48 @ max. power n2 @ max. power 20 MHz, SCS 15 kHz n5 @ max.
  • Page 126 Smart Module Series n77 @ 26 dBm 100 MHz, SCS 30 kHz n78 @ 26 dBm 100 MHz, SCS 30 kHz DC_2A_n66A 20 MHz, SCS 15 kHz DC_2A_n77A 100 MHz, SCS 30 kHz DC_4A_n78A 20 MHz, SCS 30 kHz DC_5A_n7A 20 MHz, SCS 15 kHz DC_5A_n25A 10 MHz, SCS 15 kHz...

  • Page 127: Digital I/O Characteristic

    ⚫ NOTE The power consumption data above is for reference only, which may vary among different modules. For detailed information, contact Quectel Technical Support for the power consumption test report of the specific module. 6.4. Digital I/O Characteristic Table 63: 1.8 V I/O Requirements...
  • Page 128 Smart Module Series Table 65: (U)SIM High-voltage I/O Requirements Parameter Description Min. Max. Unit USIM_VDD Power supply 3.05 High-level input voltage 1.89 3.35 Low-level input voltage -0.3 0.61 High-level output voltage 2.16 3.05 Low-level output voltage Table 66: SD Card Low-voltage I/O Requirements Parameter Description Min.

  • Page 129: Esd Protection

    Smart Module Series 6.5. ESD Protection Static electricity occurs naturally and it may damage the module. Therefore, applying proper ESD countermeasures and handling methods is imperative. For example, wear anti-static gloves during the development, production, assembly and testing of the module; add ESD protection components to the ESD sensitive interfaces and points in the product design.

  • Page 130: Mechanical Information

    Smart Module Series Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ± 0.2 mm unless otherwise specified. 7.1. Mechanical Dimensions Pin 1 Figure 40: Module Top and Side Dimensions SG560D_Series_Hardware_Design 129 / 149...
  • Page 131 Smart Module Series Figure 41: Module Bottom Dimensions (Bottom View) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. SG560D_Series_Hardware_Design 130 / 149...

  • Page 132: Recommended Footprint

    Smart Module Series 7.2. Recommended Footprint Figure 42: Recommended Footprint NOTE Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. SG560D_Series_Hardware_Design 131 / 149...

  • Page 133: Top And Bottom Views

    Figure 43: Top & Bottom Views of the Module NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. SG560D_Series_Hardware_Design 132 / 149...

  • Page 134: Storage, Manufacturing And Packaging

    Smart Module Series Storage, Manufacturing and Packaging 8.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. Recommended Storage Condition: the temperature should be 23 ± 5 ° C and the relative humidity should be 35–60 %.

  • Page 135: Manufacturing And Soldering

    Smart Module Series NOTE To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. Pay attention to ESD protection, such as wearing anti-static gloves, when touching the modules.
  • Page 136 RoHS compliant and their mercury content is below 1000 ppm (0.1 %). Due to the complexity of the SMT process, please contact Quectel Technical Support in advance for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering) that is not mentioned in document [4].

  • Page 137: Packaging Specification

    Smart Module Series 8.3. Packaging Specification This chapter outlines the key packaging parameters and processes. All figures below are for reference purposes only, as the actual appearance and structure of packaging materials may vary in delivery. The modules are packed in an injection tray packaging as specified in the sub-chapters below. 8.3.1.
  • Page 138 Smart Module Series 8.3.2. Packaging Process Each injection tray packs 8 modules. Stack 10 trays with modules, and place 1 empty tray on top. Fasten the 11 trays. Add the humidity indicator card and desiccant bag on top, and place 2 cushioning pads on the top and bottom of the trays.

  • Page 139: Appendix References

    Smart Module Series Appendix References Table 71: Related Documents Document Name [1] Quectel_Smart_5G_EVB_User_Guide [2] Quectel_RF_Layout_Application_Note [3] Quectel_Module_Stencil_Design_Requirements [4] Quectel_Module_SMT_Application_Note Table 72: Terms and Abbreviations Abbreviation Description Adaptive Multi-Rate BeiDou Navigation Satellite System Bluetooth Low Energy Bytes per second BPSK Binary Phase Shift Keying Basic Rate CDMA Code Division Multiple Access...
  • Page 140 Smart Module Series Camera Serial Interface Clear To Send Dual Band Simultaneous Data Coding Scheme DMIC Digital Microphone Discontinuous Reception Display Serial Interface Enhanced Data Rate Enhanced Full Rate Expandable Polyethylene EGSM Enhanced GSM eSCO Extended Synchronous Connection Oriented Electrostatic Discharge Equivalent Series Resistance ETSI European Telecommunications Standards Institute...
  • Page 141 Smart Module Series GPRS General Packet Radio Service Global Positioning System Graphics Processing Unit Global System for Mobile Communications HPUE High Power User Equipment Half Rate HSDPA High Speed Downlink Packet Access HTTP Hypertext Transfer Protocol Inter-IC Sound IEEE Institute of Electrical and Electronics Engineers International Mobile Telecommunications Liquid Crystal Display Liquid Crystal Monitor...
  • Page 142 Smart Module Series Negative Temperature Coefficient Over-the-air programming On-The-Go Printed Circuit Board Personal Digital Assistant Protocol Data Unit Paging Frame Power Management Unit Portable Navigation Devices Point of Sale Phase Shift Keying Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying QZSS Quasi-Zenith Satellite System Radio Frequency...
  • Page 143 Smart Module Series Serial Peripheral Interface Station To Be Determined Time Division Duplexing TD-SCDMA Time Division-Synchronous Code Division Multiple Access Touch Panel TTFF Time to First Fix Transient Voltage Suppressor UART Universal Asynchronous Receiver/Transmitter Universal Flash Storage UMTS Universal Mobile Telecommunications System Universal Serial Bus (U)SIM (Universal) Subscriber Identity Module...
  • Page 144 Important Note notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Quectel that they wish to change the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID (new application) procedure followed by a Class II permissive change application.
  • Page 145 Smart Module Series Antenna Installation (1) The antenna must be installed such that 20 cm is maintained between the antenna and users, (2) The transmitter module may not be co-located with any other transmitter or antenna. (3) Only antennas of the same type and with equal or less gains as shown below may be used with this module.
  • Page 146 Smart Module Series connected. - Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.
  • Page 147 Smart Module Series Industry Canada Statement This device complies with Industry Canada’s licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device.
  • Page 148 Smart Module Series d'informations de contrôle ou de signalisation ou l'utilisation de codes répétitifs lorsque cela est requis par la technologie. Le dispositif utilisé dans la bande 5150-5250 MHz est réservé à une utilisation en intérieur afin de réduire le risque de brouillage préjudiciable aux systèmes mobiles par satellite dans le même canal; Le gain d'antenne maximal autorisé...
  • Page 149 Smart Module Series NOTE IMPORTANTE: Dans le cas où ces conditions ne peuvent être satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre émetteur), l'autorisation du Canada n'est plus considéré comme valide et l'ID IC ne peut pas être utilisé sur le produit final. Dans ces circonstances, l'intégrateur OEM sera chargé...
  • Page 150 Smart Module Series d’aéronef sans pilote. L’exploitation sur des plates-formes pétrolières, des automobiles, des trains, des navires maritimes et des aéronefs doit être interdite, sauf à bord de gros aéronefs volant au-dessus de 3 048 m (10 000 pi). SG560D_Series_Hardware_Design 149 / 149...

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