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Appendix E Asic Pci Function 1: Pos Uarts - IBM 4840-563 System Reference Manual

Technical system reference surepos 500 series
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Appendix E ASIC PCI Function 1: POS UARTs

In the custom ASIC, SurePOS 500-XX3 provides 4 additional 16550 compatible UARTs, one of which is
general use and the other 3 are special-use. The IO address and IRQ are programmable through function 1
of the ASIC.
Below are the identification value registers for the UART PCI function:
PCI Vendor ID: 1014h
PCI Device ID: 02A4h
PCI Subsystem Vendor ID: 1014h
PCI Subsystem ID: 02A5h
COM port/UART Assignments:
COM3 (VFD)
= Base Address 0: UART 0 base I/O address (eight bytes)
COM4 (MSR)
= Base Address 1: UART 1 base I/O address (eight bytes)
COM5 (Touch) = Base Address 2: UART 2 base I/O address (eight bytes)
COM6 (general) = Base Address 3: UART 3 base I/O address (eight bytes)
Configuration Registers for Function 1:
31-24
Device ID
(02A4h)
Status Register
Class Code (070002h)
Reserved (00h)
Header Type (00h)
PCI Subsystem Vendor/Subsystem ID
Reserved (00h)
Reserved (00h)
SurePOS 500 Model XX3 Technical Reference, v 1.3
23-16
Latency Timer
(00h)
Claims 8 I/O addresses for UART 0
Claims 8 I/O addressesfor UART 1
Claims 8 I/O addresses for UART 2
Claims 8 I/O addresses for UART 3
Reserved (00000000h)
Reserved (00000000h)
Reserved (00000000h)
Reserved (00000000h)
Reserved (00000000h)
Reserved (00000000h)
Interrupt Pin Use
Reserved (00h)
Interrupt Status
Reserved (00h)
Register B
15-8
Vendor ID
(1014h)
Command Register
Revision ID
Cache Line Size
(00h)
(loaded from Config EEPROM)
Interrupt Line
INTB# (02h)
Reserved (00h)
81
7-0
Address
00h
04h
(01h)
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
40h
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