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EVB-LAN9662
Evaluation Board
User's Guide
 2022-2024 Microchip Technology Inc. and its subsidiaries
DS50003432B

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Summary of Contents for Microchip Technology EVB-LAN9662

  • Page 1 EVB-LAN9662 Evaluation Board User’s Guide  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B...
  • Page 2 The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies.
  • Page 3: Table Of Contents

    1.9.2 PTP/IEEE1588v2/802.1AS-2020 .............. 14 Chapter 2. Management Software 2.1 Introduction ....................15 2.2 Switchdev for Management and Debugging ..........15 Chapter 3. EVB-LAN9662 End-Node and EVB-LAN9662-Carrier Boards 3.1 Introduction ....................17 3.2 EVB-LAN9662 End-Node Module ..............17 3.2.1 Board Overview ..................17 3.2.2 Power DC Input and LED ................
  • Page 4 EVB-LAN9662 Evaluation Board User’s Guide 3.2.10 Edge Connector ..................19 3.2.11 Boot Modes and Reference Clock ............20 3.3 EVB-LAN9662-Carrier Board for EVB-LAN9662 .......... 20 3.3.1 Board Overview ..................20 3.3.2 Power DC Input and LED ................20 3.3.3 SFP Connectors with Associated Status LEDs ..........20 3.3.4 SMA Connectors at Rear ................21...
  • Page 5 Appendix A. PCB Layout and Silk Screens A.1 Introduction ....................51 A.2 EVB-LAN9662 End-Node PCB Layers ............52 A.2.1 EVB-LAN9662 End-Node Layer 1 (TOP) ..........53 A.2.2 EVB-LAN9662 End-Node Layer 2 (GND) ..........54 A.2.3 EVB-LAN9662 End-Node Layer 3 (POWER) ..........55 A.2.4 EVB-LAN9662 End-Node Layer 4 (BOTTOM) ..........
  • Page 6 EVB-LAN9662 Evaluation Board User’s Guide NOTES:  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 6...
  • Page 7: Preface

    • Customer Support • Document Revision History DOCUMENT LAYOUT This document features the EVB-LAN9662 Evaluation Board. The manual layout is as follows: • Chapter 1. “Overview” – This chapter provides a brief overview of the EVB-LAN9662 evaluation board and its features.
  • Page 8: Conventions Used In This Guide

    Choice of mutually exclusive errorlevel {0|1} character: { | } arguments; an OR selection Ellipses... Replaces repeated text var_name [, var_name...] Represents code supplied by void main (void) user { ...  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 8...
  • Page 9: Warranty Registration

    MPLAB REAL ICE in-circuit emulator, MPLAB ICD 3 in-circuit debugger and MPLAB PM3 device programmers. Also included ® are non-production development programmers such as PICSTART Plus and PICkit™ 2 and 3.  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 9...
  • Page 10: Customer Support

    Updated block diagram. (07-10-24) Figure 5-1 Updated block diagram. Made minor formatting changes. Changed all occurrences of UNG8309(B) to LAN9662-Carrier. Changed all occurrences of UNG8291(C) to EVB-LAN9662 End-Node. DS50003432A Initial release (11-04-22)  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 10...
  • Page 11: Chapter 1. Overview

    LAN9662 TSN Ethernet switch architec- ture with Real-Time Engine (RTE) functionality. The LAN9662 End-Node module is based on the EVB-LAN9662 End-Node reference design, and the carrier board is based on EVB-LAN9662-Carrier reference design. This document is intended primarily for hardware and software engineers who want to get an overview of designing products based on the LAN9662.
  • Page 12: Evb-Lan9662 Overview

    • Ultra fast frame manipulation for cyclical data flows FEATURES The EVB-LAN9662 is a managed end-node module with expansion headers for all other than the basic functionality of the LAN9662. The module features: • LAN9662 AVB/TSN switch with internal Real-Time Engine and 600 MHz ARM Cortex A7 CPU •...
  • Page 13: Cpu System

    • Powered from either micro-USB port, the Edge connector, or the Expansion header The EVB-LAN9662-Carrier board exposes more interfaces and functionality of the LAN9662 device. The carrier board is designed to hold the end-node module and pro- vides the following additional features: •...
  • Page 14: External Cpu Interfaces

    An external host CPU system can be connected to and control the LAN9662 configured as a client device through the external CPU, using either: • PCIe 2.0 endpoint connection through the EVB-LAN9662 Edge connector to an external host system located on EVB-LAN9662-Carrier board Raspberry Pi com- pute module 4 connectors •...
  • Page 15: Chapter 2. Management Software

    The EVB-LAN9662 evaluation board is managed through a console port using stan- dard Linux commands. SWITCHDEV FOR MANAGEMENT AND DEBUGGING The EVB-LAN9662 End-Node module can be connected directly to a laptop USB port using a basic USB 2.0 A-Male to Micro-B cable to access the Linux CLI running on the switch.
  • Page 16 11386 // Show speed and duplex # ethtool eth0 Settings for eth0: Supported ports: [ TP MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 16...
  • Page 17: Chapter 3. Evb-Lan9662 End-Node And Evb-Lan9662-Carrier Boards

    EVB-LAN9662 EVALUATION BOARD USER’S GUIDE Chapter 3. EVB-LAN9662 End-Node and EVB-LAN9662-Carrier Boards INTRODUCTION This section gives an overview of the EVB-LAN9662 End-Node module and EVB-LAN9662-Carrier board. EVB-LAN9662 END-NODE MODULE 3.2.1 Board Overview Figure 3-1 shows the component placement on the EVB-LAN9662 PCB.
  • Page 18: Reset Button And Led

    600 mA. ® 3.2.7 PCIe 2.0 Endpoint The end-node module offers PCIe 2.0 endpoint connection through the Edge connec- tor. It can only be used together with the carrier board.  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 18...
  • Page 19: Arm ® Cpu Jtag Connector

    Expansion header. 3.2.10 Edge Connector A 260-pin SO-DIMM socket on the EVB-LAN9662-Carrier board is used for the inter- connection with the male part on the EVB-LAN9662 End-Node module. This Edge connector exposes the following direct interfaces on LAN9662: •...
  • Page 20: Boot Modes And Reference Clock

    However, the on-board buck step-down DC-DC regulator behind accepts 7.5V to 30V input range to deliver a 5V output. The 5 VDC output powers the EVB-LAN9662 End-Node module, the CM4 module, HDMI interface, CAN bus, USB host and the carrier board’s own local DC/DC convert- ers: 1.2V/1.2A, 2.5V/0.2A and 3.3V/1A.
  • Page 21: Sma Connectors At Rear

    • Micro-USB 2.0 console port, J18 • Micro-SD connector, J17 • HDMI connector, J16 • Raspberry Pi HAT ID EEPROM • Configuration header, J22 • Raspberry Pi activity by using a green LED, D39  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 21...
  • Page 22 EVB-LAN9662 Evaluation Board User’s Guide NOTES:  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 22...
  • Page 23: Chapter 4. Evb-Lan9662 End-Node Hardware Details

    Chapter 4. EVB-LAN9662 End-Node Hardware Details BLOCK DIAGRAM Figure 4-1 depicts the block diagram of the EVB-LAN9662 End-Node module with its two Ethernet copper front ports, USB ports and expansion connectors, all marked in green. DC/DC converters are marked red.
  • Page 24: Pll Strapping

    The end-node module has a local 25 MHz XTAL, VXM7-9013 as reference input, which provides all the necessary clocking for the end-node modules to function, both as standalone or together with the EVB-LAN9662-Carrier board. However, the module is prepared for using an external 25 MHz reference clock to the switch core and internal Cu PHYs, and/or to use an external 125 MHz differential ref- erence clock, like DSC1201 for the SerDes macros.
  • Page 25: Ddr3L Sdram

    NOR Flash device mounted. For production, it is then recommended to use a preprogrammed e-MMC device, or to have an additional test connector, like TC2050, being placed between LAN9662 and the e-MMC for on-board programming.  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 25...
  • Page 26: Pcie ® 2.0 Endpoint

    CPU system. A powerful external CPU system can however easily make it opposite and much faster. The PCIe 2.0 endpoint connection goes through the EVB-LAN9662 Edge connector to the external host system, which is located on EVB-LAN9662-Carrier Raspberry Pi com- pute module 4 connectors.
  • Page 27: Ethernet Ports

    HW reset Note 1: The JTAG signals are not 5V-tolerant. JTAG signal levels are determined by the VDD_IOB power supply pin, which is set to 3.3V on EVB-LAN9662. VDD_IOB can also be set to 1.8V or 2.5V. ETHERNET PORTS The LAN9662 has four logical Ethernet ports exposed on various interfaces. The LAN9662 end-node module exposes two internal Cu PHYs (ports 0 and 1) and two Ser- Des interfaces (ports 2 and 3).
  • Page 28: Icm-Integrated Magnetics

    It is important to program the MCP2221A during board bring-up, so that Note: GP2 is changed from the default output mode to an input. Otherwise, the EVB-LAN9662 will be in held in reset. Figure 4-4 outlines the micro-USB console port on the end-node module.
  • Page 29: Usb 2.0 Host Port

    LAN9662 GPIO56.) The MIC6315 generates the overall board reset signal, nSYSRESET. A red LED, D1, is controlled by this output signal and is used to indicate the Reset state.  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 29...
  • Page 30: Power Supply

    It can be used for programming the NOR Flash device or give an external CPU control over the SPI client register interface, and exposes various LAN9662 GPIO signals in Alternate mode.  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 30...
  • Page 31 GPIO 41 (VCORE_CFG1) GPIO 58 C SDA (FC4b) GPIO 57 C SCL (FC4b) GPIO 35 (CAN0b Rx/PTP0 IN) — (CAN0b Tx/PTP1 OUT) GPIO 36 GPIO 51 (PWM_B) (PLL1) GPIO 65 (VCORE_CFG3) —  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 31...
  • Page 32 FC = FLEXCOM, FCS = FLEXCOM Shared Although the schematic shows the MDC_B/MDIO_B signals in the Expansion header, they are not currently available because the serial GPIO0 uses the same GPIO pins.  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 32...
  • Page 33: Edge Connector

    EVB-LAN9662 End-Node Hardware Details EDGE CONNECTOR The EVB-LAN9662 End-Node module is the male part of a 260-pin, high-speed SO-DIMM socket on the EVB-LAN9662-Carrier board. The Edge connector exposes most I/O pins on the LAN9662. Table 4-6 shows the placement in the Edge connector. Strapping pins are marked in green, power is marked in orange and ground in gray.
  • Page 34: Gpio Usage Overview

    Each GPIO pin in the LAN9662 can be assigned to one of up to eight functions. The following tables show which GPIOs and functionality have been used in the EVB-LAN9662 End-Node design. Strapping pins are marked in green. TABLE 4-7: GPIO USAGE—PI INTERFACE...
  • Page 35 SPI.MOSI IB_TRIG_3 3 (5) IO-FPGA EVB-LAN9662-Carrier (FCS4 – SPI.nCS) IB_TRIG_4 3 (1) IO-FPGA EVB-LAN9662-Carrier/Exp.header (FC1c – I2C.SCL) IB_TRIG_5 3 (1) IO-FPGA EVB-LAN9662-Carrier/Exp.header (FC1c – I2C.SDA) IO-FPGA FCS7 EVB-LAN9662-Carrier/Exp.header IO-FPGA GPIO50 EVB-LAN9662-Carrier/Exp.header  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 35...
  • Page 36 EVB-LAN9662 End-Node e-MMC D5 (SD WP) 1 (4) e-MMC EVB-LAN9662 End-Node e-MMC D6 (SD CD) e-MMC D7 1 (4) e-MMC EVB-LAN9662 End-Node (SD LED - unused) e-MMC EVB-LAN9662 End-Node e-MMC RSTN  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 36...
  • Page 37: Chapter 5. Evb-Lan9662-Carrier Hardware Details

    EVALUATION BOARD USER’S GUIDE Chapter 5. EVB-LAN9662-Carrier Hardware Details BLOCK DIAGRAM The EVB-LAN9662-Carrier board is intended to expand the functionality of the EVB-LAN9662 End-Node module. Figure 5-1 depicts the block diagram of the EVB-LAN9662-Carrier board with its various I/O interfaces (marked in green) and DC/DC converters (marked in red).
  • Page 38: Sfp Connectors Supported Through The Serial Gpio

    5.3.2 Serial GPIO Output For the output: • Output SGPIO ports 0-1: (EVB-LAN9662 End-Node copper ports P0 and P1 LEDs b0 and b1) • Output SGPIO ports 2: SFP0 control of green and red LEDs • Output SGPIO ports 3: SFP1 control of green and red LEDs •...
  • Page 39: Sma Connectors At Rear

    FIGURE 5-3: SERIAL GPIO OUTPUT Note: The first 8-bit shift register has been replicated on EVB-LAN9662 End-Node module for local port LED support. Each Tx_Enable signal is inverted before use on the SFP module, as the 74HC594 resets output signals to low, and the SFP TX_DISABLE input is active high. This means an inverting buffer is required to output disable SFPs during Reset state.
  • Page 40: Io-Fpga For Rte Support

    LEDs (green and yellow) that are used for additional IO-FPGA status indica- tion, D37-D38. For optional use and debug, there are two 8-pin DIP switches, SW1 and SW2, to force inputs high.  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 40...
  • Page 41: User Button Input To Fpga

    3.3V power — — Boundary scan Reset pin, active low, TRSTB weak pull-up resistor Test serial input for JTAG boundary TDI (PD) scan, ISP, and UJTAG usage Weak pull-up — Ground  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 41...
  • Page 42: Fpga Header For Debug Spi Access

    5.6.6 FPGA Probe The carrier board provides a 3-pin header, J7, for FPGA probing. The two live probe I/O cells have two purposes: • Live probe functionality • User I/O  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 42...
  • Page 43: Raspberry Pi Compute Module 4 Interface Connector

    Figure 5-8 show the connection diagrams. TABLE 5-4: RPI CM4 CONNECTOR, J15 Description Description EEPROM_nWP RPI_nLED_ACT ID_SC ID_SD SI.CLK SI.nCS SI.D0 SI.D1 SC_CLK SD_DAT3 SD_CMD SD_DAT0 SD_DAT1 SD_DAT2 SD_PWR_ON SD_DET GPIO_VREF  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 43...
  • Page 44 RASPBERRY PI COMPUTE MODULE 4 INTERFACE CONNECTOR, J15 Note: RPI activity is displayed with a green LED, D39. TABLE 5-5: RPI CM4 CONNECTOR, J19 Description Description USBOTG_ID PCIE_CLK_nREQ USB2PI_N USB2PI_P  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 44...
  • Page 45 EVB-LAN9662-Carrier Hardware Details TABLE 5-5: RPI CM4 CONNECTOR, J19 (CONTINUED) Description Description PCIE_nRST PCIE_CLK_P PCIE_CLK_N PCIE_TX_P PCIE_TX_N PCIE_RX_P PCIE_RX_N HDMI0_CEC HDMI0_HOTPLUG HDMI0_D2_P HDMI0_D2_N HDMI0_D1_P HDMI0_D1_N HDMI0_D0_P HDMI0_D0_N HDMI0_CK_P HDMI0_CK_N  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 45...
  • Page 46: Pcie ® 2.0 Endpoint And Spi

    When operating as USB host, a USB switch located on the carrier board connects the Raspberry Pi 4 USB port to a USB hub, USB2512B-I/M2, to provide two USB 2.0 host ports. Figure 5-9 shows the use of the USB host hub.  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 46...
  • Page 47 2x1 USB type-A female connector, J20. The USB host ports are current limited to 600 mA by using MIC2039. FIGURE 5-10: CM4 USB HOST POWER AND CONNECTORS  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 47...
  • Page 48: Cm4 Micro-Usb Console Port

    Figure 5-12 shows the HDMI connector supported by the Raspberry Pi compute mod- ule 4. The HDMI is current limited to 50 mA by using MIC2005A. FIGURE 5-12: CM4 HDMI CONNECTOR  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 48...
  • Page 49: Cm4 Micro-Sd Connector

    2x6-pin male header, J22, used for CM4 configuration. The CM4 configuration signals found here are: WL_nDIS, BT_nDIS, EEPROM_nWP, nRPI- BOOT, GLOBAL_EN, CM4_GPIO14, and CM4_GPIO15. FIGURE 5-15: CM4 CONFIGURATION HEADER  2022-2024 Microchip Technology Inc.and its subsidiaries DS50003432B-page 49...
  • Page 50: Optional Reference Clock

    SO-DIMM connector. CONTROL OF BOARD RESET The CM4 module can control the Reset of the full EVB-LAN9662 evaluation board through the PCIe_nRST. Optionally, the PCIe_nRST can be set to only reset the LAN9662 PCIe endpoint controller.
  • Page 51: Appendix A. Pcb Layout And Silk Screens

    EVB-LAN9662 AND EVB-LAN9662-CARRIER OUTLINE The LAN9662 package pinout is specifically optimized for low-cost PCB designs. As a result, the EVB-LAN9662 End-Node module has only four PCB layers, while the EVB-LAN9662-Carrier reference board has six PCB layers.  2022-2024 Microchip Technology Inc.and its subsidiaries...
  • Page 52: Evb-Lan9662 End-Node Pcb Layers

    EVB-LAN9662 Evaluation Board User’s Guide On the EVB-LAN9662 module, all signals are routed on the top and bottom layers, 1 and 4. Layer 2 is a solid ground plane, which is also used to remove heat from components, and it must (also for this reason) be ensured, that good connection between the outer layer ground fills and the ground planes are estab- lished.
  • Page 53: Evb-Lan9662 End-Node Layer 1 (Top)

    PCB Layout and Silk Screens A.2.1 EVB-LAN9662 End-Node Layer 1 (TOP) The EVB-LAN9662 End-Node layer 1 consists of mostly signal traces for DDR3L and SerDes macros, SFP slots. FIGURE A-3: EVB-LAN9662 END-NODE LAYER 1  2022-2024 Microchip Technology Inc. and its subsidiaries...
  • Page 54: Evb-Lan9662 End-Node Layer 2 (Gnd)

    EVB-LAN9662 Evaluation Board User’s Guide A.2.2 EVB-LAN9662 End-Node Layer 2 (GND) The EVB-LAN9662 End-Node layer 2 is pure ground plane. FIGURE A-4: EVB-LAN9662 END-NODE LAYER 2  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 54...
  • Page 55: Evb-Lan9662 End-Node Layer 3 (Power)

    PCB Layout and Silk Screens A.2.3 EVB-LAN9662 End-Node Layer 3 (POWER) The EVB-LAN9662 End-Node layer 3 consists of power and ground planes. FIGURE A-5: EVB-LAN9662 END-NODE LAYER 3 2.5V 1.35V 1.1V 3.3V  2022-2024 Microchip Technology Inc. and its subsidiaries...
  • Page 56: Evb-Lan9662 End-Node Layer 4 (Bottom)

    EVB-LAN9662 Evaluation Board User’s Guide A.2.4 EVB-LAN9662 End-Node Layer 4 (BOTTOM) FIGURE A-6: EVB-LAN9662 END-NODE LAYER 4  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 56...
  • Page 57: Evb-Lan9662 End-Node Ddr3L Close Up

    Refer to Figure A-7 Figure A-8 to see how the DDR length matching is acquired. FIGURE A-7: EVB-LAN9662 END-NODE DDR3L CLOSE UP (TOP) FIGURE A-8: EVB-LAN9662 END-NODE DDR3L CLOSE UP (BOTTOM)  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 57...
  • Page 58: Evb-Lan9662 End-Node Pcb Layer Stack-Up

    EVB-LAN9662 Evaluation Board User’s Guide A.2.6 EVB-LAN9662 End-Node PCB Layer Stack-up The EVB-LAN9662 End-Node module is a 4-layer impedance-controlled PCB. Figure A-9 shows the stack-up. FIGURE A-9: EVB-LAN9662 END-NODE PCB STACK-UP  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 58...
  • Page 59: Evb-Lan9662-Carrier Pcb Layers

    PCB Layout and Silk Screens EVB-LAN9662-CARRIER PCB LAYERS Figure A-10 shows the overall placement of components on the EVB-LAN9662-Carrier board. FIGURE A-10: EVB-LAN9662-CARRIER TOP SILK SCREEN Table A-2 describes the different layers in the EVB-LAN9662-Carrier board. TABLE A-2: EVB-LAN9662-CARRIER PCB LAYERS AND DESCRIPTIONS...
  • Page 60: Evb-Lan9662-Carrier Layer 1 (Top)

    EVB-LAN9662 Evaluation Board User’s Guide A.3.1 EVB-LAN9662-Carrier Layer 1 (TOP) The EVB-LAN9662-Carrier layer 1 consists of the following: • SerDes signals to SFP slots • UM4 Debug and control signals to Config header, J22 • UM4 USB Switch, USB2512B • Digital input, dip-switch SW1 and SW2 to IO-FPGA •...
  • Page 61: Evb-Lan9662-Carrier Layer 2 (Gnd)

    PCB Layout and Silk Screens A.3.2 EVB-LAN9662-Carrier Layer 2 (GND) The EVB-LAN9662-Carrier layer 2 is pure ground plane with cutout around the DC/DC power supplies. FIGURE A-12: EVB-LAN9662-CARRIER LAYER 2  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 61...
  • Page 62: Evb-Lan9662-Carrier Layer 3 (Power)

    The EVB-LAN9662-Carrier layer 3 consists of: • Dark green ground • Red 5V HDMI • Blue 1.2V for IO-FPGA • Light green for IO-FPGA Digital I/O FIGURE A-13: EVB-LAN9662-CARRIER LAYER 3  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 62...
  • Page 63: Evb-Lan9662-Carrier Layer 4 (Power)

    • Pink is 3.3V, light green is 2.5V to IO-FPGA • Dark green is ground for the 12V supply input • Digital I/O from IO-FPGA to pin headers: J10, J11, J13, and J14. FIGURE A-14: EVB-LAN9662-CARRIER LAYER 4  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 63...
  • Page 64: Evb-Lan9662-Carrier Layer 5 (Gnd)

    EVB-LAN9662 Evaluation Board User’s Guide A.3.5 EVB-LAN9662-Carrier Layer 5 (GND) The EVB-LAN9662-Carrier layer 5 consists of pure ground plane with cutout around the DC/DC power sup- plies. FIGURE A-15: EVB-LAN9662-CARRIER LAYER 5  2022-2024 Microchip Technology Inc. and its subsidiaries...
  • Page 65: Evb-Lan9662-Carrier Layer 6 (Bottom)

    • UM4 Host USB connector and shielding • UM4 micro-USB, USB3740B and shielding • UM4 HAT EEPROM, 24LC32AT • UM4 HDMI SerDes and shielding • Serial GPIO: U1, U4 and U6 FIGURE A-16: EVB-LAN9662-CARRIER LAYER 6  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 65...
  • Page 66: Evb-Lan9662-Carrier Pcb Layer Stack-Up

    EVB-LAN9662 Evaluation Board User’s Guide A.3.7 EVB-LAN9662-Carrier PCB Layer Stack-Up The EVB-LAN9662-Carrier board is a 6-layer impedance-controlled PCB. Figure A-17 shows the stack-up. FIGURE A-17: EVB-LAN9662-CARRIER PCB STACK-UP  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 66...
  • Page 67: Pcb Trace Widths And Clearance

    PCB Layout and Silk Screens PCB TRACE WIDTHS AND CLEARANCE • EVB-LAN9662 End-Node module thickness: 1.2 mm ±10% • EVB-LAN9662-Carrier board thickness: 1.6 mm ±10% • Characteristic impedance single-ended: 50Ω or 60Ω • Characteristic impedance differential USB signals: 90Ω • Single-ended trace width: 150 μm and 125 μm •...
  • Page 68: Worldwide Sales And Service

    Tel: 46-31-704-60-40 Tel: 631-435-6000 Sweden - Stockholm San Jose, CA Tel: 46-8-5090-4654 Tel: 408-735-9110 UK - Wokingham Tel: 408-436-4270 Tel: 44-118-921-5800 Canada - Toronto Fax: 44-118-921-5820 Tel: 905-695-1980 Fax: 905-695-2078  2022-2024 Microchip Technology Inc. and its subsidiaries DS50003432B-page 68 04/15/24...

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