Icom IC-F10 Service Manual page 8

SECTION 5
CIRCUIT DESCRIPTION
5-1 RECEIVER CIRCUITS
5-1-1 ANTENNA SWITCHING CIRCUIT
(RF UNIT)
Received signals pass through a low-pass filter (L9, L8, L17,
C37—C41, С125). Тһе filtered signals are applied to the
МА type antenna switching circuit (L7, C35, C34, 16, О5,
C105).
The antenna switching circuit functions as a low-pass filter
while receiving. However, its impedance becomes very
high while D5 is turned ON. Thus, transmit signals are
blocked from entering the receiver сігсийв. The antenna
switching circuit employs а Л/4 type diode switching
system. The passed signals are then applied to the RF
amplifier circuit.
5-1-2 RF CIRCUIT (RF UNIT)
The RF circuit amplifies signals within the range of
frequency coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass
through а band-pass filter (15, С32, 04, C31), and аге
then applied to the RF amplifier (Q3). The amplified
signals are passed through the band-pass filter (L2—L4,
01--03) to suppress unwanted signals.
01—04 employ varactor diodes that track the band-pass
filters and are controlled by the PLL lock voltage. These
diodes tune the center frequency of an RF passband for
wide bandwidth receiving and good image response
rejection.
5-1-3 1st MIXER AND 1st IF CIRCUITS
(RF UNIT)
The 1st mixer circuit converts the received signal to a
fixed frequency of the 151 IF signal with a PLL output
frequency. By changing the PLL frequency, only the
desired frequency will be passed through a pair of crystal
filters at the next stage of the 1st mixer.
The signals from the RF circuit are mixed at Q2 with a
ist LO signal coming from the VCO board to produce а
21.80 MHz 1st IF signal.
After passing through the matching circuit (L1), the 1st IF
signal is applied to a pair of crystal filters (Е12) to suppress
out-of-band signals. The 15% IF signal is amplified at
the IF amplifier (Q1) and applied to the 2nd mixer circuit
(IC1 pin 16).
5-1-4 2nd IF AND DEMODULATOR
CIRCUITS (RF UNIT)
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double superheterodyne system (which converts
receive signals twice) improves the image rejection ratio
and obtains stable receiver gain.
The 1st IF signal from Q1 is applied to the 2nd mixer section
of IC1 (pin 16), and is mixed with the 2nd LO signal to be
converted to a 455 kHz 2nd IF signal.
ІСІ contains the 2nd mixer, 2nd local oscillator, limiter
amplifier and quadrature detector circuits. The 2nd local
oscillator section and X2 generate 21.345 MHz for the 2nd
LO signal.
The 2nd IF signal (455 kHz) from the 2nd mixer (IC1 pin 3)
passes through the ceramic filter (ЕП) where unwanted
signals are suppressed. Н is then amplified at the limiter
amplifier section (IC1 pin 5) and applied to the quadrature
detector section (IC1 pins 10, 11 and ceramic discriminator
X1) to demodulate the 2nd IF signal into AF signals.
AF signals output from IC1 (pin 9) passes through the
CTCSS encoder/decoder IC (IC6 pins 1, 5) on the MAIN
unit. When the CTCSS squelch is in use, the tone
decoded signal ("LOW" when matched) is applied to
CPU via pin 14. The AF signals are also applied to the
connector for an optional unit. The noise detect (BUSY)
signal output from ІСІ (pin 13) is applied to the CPU
(LOGIC unit; IC1 pin 28).
• 2nd IF AND DEMODULATOR CIRCUITS
MAIN unit
2nd IF filter 21.345МН2
455 kHz х2
АЕ
signal
бе-етрһавів |
circuit
BUSY signal
to the CPU pin 28
Fig. 1