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Cypress Semiconductor enCoRe CY7C604XX Specification Sheet

V low voltage microcontroller
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Features
■
Powerful Harvard Architecture Processor
❐
M8C processor speeds running up to 24 MHz
❐
Low power at high processing speeds
❐
Interrupt controller
❐
1.71V to 3.6V operating voltage
❐
Temperature range: 0°C to 70°C
■
Flexible On-Chip Memory
❐
Up to 32K Flash program storage
• 50,000 Erase and write cycles
• Flexible protection modes
❐
Up to 2048 bytes SRAM data storage
❐
In-System Serial Programming (ISSP)
■
Complete Development Tools
❐
Free development tool (PSoC Designer™)
❐
Full featured, in-circuit emulator and programmer
❐
Full speed emulation
❐
Complex breakpoint structure
❐
128K trace memory
■
Precision, Programmable Clocking
❐
Crystal-less oscillator with support for an external crystal or
resonator
❐
Internal ±5.0% 6, 12, or 24 MHz main oscillator
❐
Internal low speed oscillator at 32 kHz for watchdog and
sleep.The frequency range is 19 to 50 kHz with a 32 kHz
typical value
enCoRe V LV Block Diagram
Cypress Semiconductor Corporation
Document Number: 001-12395 Rev *H
enCoRe™ V Low Voltage Microcontroller
Port 4
Port 3
enCoRe V
Low Voltage
CORE
SRAM
2048 Bytes
Interrupt
Controller
6/12/24 MHz Internal Main Oscillator
I2C Slave/SPI
3 16-Bit
Master-Slave
Timers
SYSTEM RESOURCES
•
198 Champion Court
■
Programmable Pin Configurations
❐
25 mA sink current on all GPIO
❐
Pull Up, High Z, Open Drain, CMOS drive modes on all GPIO
❐
Configurable inputs on all GPIO
❐
Low dropout voltage regulator for Port 1 pins. Programmable
to output 3.0, 2.5, or 1.8V at the I/O pins
❐
Selectable, regulated digital I/O on Port 1
• Configurable input threshold for Port 1
• 3.0V, 20 mA total Port 1 source current
• Hot-swappable
❐
5 mA strong drive mode on Ports 0 and 1
■
Additional System Resources
❐
Configurable communication speeds
2
❐
I
C Slave
• Selectable to 50 kHz, 100 kHz, or 400 kHz
• Implementation requires no clock stretching
• Implementation during sleep modes with less than 100 mA
• Hardware address detection
❐
SPI master and SPI slave
• Configurable between 93.75 kHz and 12 MHz
❐
Three 16-bit timers
❐
8-bit ADC used to monitor battery voltage or other signals -
with external components
❐
Watchdog and sleep timers
❐
Integrated supervisory circuit
Port 2
Port 1
Port 0
Prog. LDO
System Bus
SROM
Flash 32K
CPU Core
Sleep and
(M8C)
Watchdog
POR and LVD
System Resets
,
•
San Jose
CA 95134-1709
CY7C604XX
•
408-943-2600
Revised January 30, 2009
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Summary of Contents for Cypress Semiconductor enCoRe CY7C604XX

  • Page 1 Features ■ Powerful Harvard Architecture Processor ❐ M8C processor speeds running up to 24 MHz ❐ Low power at high processing speeds ❐ Interrupt controller ❐ 1.71V to 3.6V operating voltage ❐ Temperature range: 0°C to 70°C ■ Flexible On-Chip Memory ❐...

  • Page 2: Functional Overview

    Functional Overview The enCoRe V LV family of devices are designed to replace multiple traditional low voltage microcontroller system compo- nents with one, low cost single chip programmable component. Communication peripherals (I2C/SPI), a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

  • Page 3: Development Tools

    Development Tools ® PSoC Designer is a Microsoft Windows-based, integrated development environment System-on-Chip (PSoC) devices. The PSoC Designer IDE runs on Windows XP or Windows Vista. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and built-in support for third-party assem- blers and C compilers.
  • Page 4 Designing with PSoC Designer The development process for the enCoRe V device differs from that of a traditional fixed function microprocessor. Powerful PSoC Designer tools get the core of your design up and running in minutes instead of hours. The development process can be summarized in the following four steps: 1.

  • Page 5: Document Conventions

    Document Conventions Acronyms Used The following table lists the acronyms that are used in this document. Acronym Description application programming interface central processing unit GPIO general purpose IO in-circuit emulator internal low speed oscillator internal main oscillator input/output least significant bit low voltage detect most significant bit power on reset...

  • Page 6: Pin Configuration

    Pin Configuration 16-Pin Part Pinout Figure 1. CY7C60413 16-Pin enCoRe V LV Device Table 1. 16-Pin Part Pinout (QFN) Pin No. Type Name P2[5] P2[3] IOHR P1[7] IOHR P1[5] IOHR P1[3] IOHR P1[1] Power IOHR P1[0] IOHR P1[2] IOHR P1[4] Input XRES IOHR...
  • Page 7 32-Pin Part Pinout Figure 2. CY7C60445 32-Pin enCoRe V LV Device Table 2. 32-Pin Part Pinout (QFN) Pin No. Type Name P0[1] P2[7] P2[5] P2[3] P2[1] P3[3] P3[1] IOHR P1[7] IOHR P1[5] IOHR P1[3] (3, 4) IOHR P1[1] Power (3, 4) IOHR P1[0] IOHR...
  • Page 8 Table 2. 32-Pin Part Pinout (QFN) (continued) Pin No. Type Name Reset Input XRES P3[0] P3[2] P2[0] P2[2] P2[4] P2[6] P0[0] P0[2] P0[4] P0[6] Power P0[7] P0[5] P0[3] Power Power LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output. Notes 3.
  • Page 9 48-Pin Part Pinout Figure 3. CY7C60455/CY7C60456 48-Pin enCoRe V LV Device P2[7] P2[5] P2[3] P2[1] P4[3] P4[1] P3[7] P3[5] P3[3] P3[1] P1[7] Table 3. 48-Pin Part Pinout (QFN) Pin No. Type Name P2[7] P2[5] P2[3] P2[1] P4[3] P4[1] P3[7] P3[5] P3[3] P3[1] IOHR...
  • Page 10 Table 3. 48-Pin Part Pinout (QFN) (continued) Pin No. Type Name Power Power (3, 4) IOHR P1[0] IOHR P1[2] IOHR P1[4] IOHR P1[6] XRES Ext Reset P3[0] P3[2] P3[4] P3[6] P4[0] P4[2] P2[0] P2[2] P2[4] P2[6] P0[0] P0[2] P0[4] P0[6] Power P0[7] P0[5]...

  • Page 11: Register Reference

    Register Reference The section discusses the registers of the enCoRe V LV device. It lists all the registers in mapping tables, in address order. Register Conventions The register conventions specific to this section are listed in the following table. Table 4. Register Conventions Convention Description Read register or bits...
  • Page 12 Table 5. Register Map Bank 0 Table: User Space Name Addr (0,Hex) Access Name PRT0DR PRT0IE PRT1DR PRT1IE PRT2DR PRT2IE PRT3DR PRT3IE PRT4DR PRT4IE SPI_TXR SPI_RXR SPI_CR Gray fields are reserved and should not be accessed. # Access is bit specific. Document Number: 001-12395 Rev *H Addr (0,Hex) Access...
  • Page 13 Table 6. Register Map Bank 1 Table: Configuration Space Name Addr (1,Hex) Access Name PRT0DM0 PRT0DM1 PRT1DM0 PRT1DM1 PRT2DM0 PRT2DM1 PRT3DM0 PRT3DM1 PRT4DM0 PRT4DM1 SPI_CFG TMP_DR0 TMP_DR1 TMP_DR2 TMP_DR3 Gray fields are reserved and should not be accessed. # Access is bit specific. Document Number: 001-12395 Rev *H Addr (1,Hex) Access...

  • Page 14: Electrical Specifications

    Electrical Specifications This section presents the DC and AC electrical specifications of the enCoRe V LV devices. For the most up to date electrical specifications, verify that you have the most recent data sheet available by visiting the company web site at Figure 4.
  • Page 15 ADC Electrical Specifications Table 8. ADC Electrical Specifications Symbol Description Input Input Voltage Range Input Capacitance Resolution 8-Bit Sample Rate DC Accuracy Offset Error Operating Current Data Clock Monotonicity Power Supply Rejection Ratio PSRR (Vdd>3.0V) PSRR (2.2 < Vdd < 3.0) PSRR (2.0 <...

  • Page 16: Maximum Ratings

    Maximum Ratings Storage Temperature (T C to 125 Supply Voltage Relative to Vss (Vdd) ... -0.5V to +4.0V DC Input Voltage (V )... Vss - 0.5V to Vdd + 0.5V DC Voltage Applied to Tri-state (V )Vss - 0.5V to Vdd + 0.5V Maximum Current into any Port Pin (I DC Electrical Characteristics DC Chip Level Specifications...
  • Page 17 DC General Purpose I/O Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 1.71V to 3.6V and 0°C ≤ T ≤ 70°C. Typical parameters apply to 3.3V at 25°C. These are for design guidance only. Table 10.
  • Page 18 Table 11. 2.4V to 3.0V DC GPIO Specifications Symbol Description Pull Up Resistor High Output Voltage Port 2 or 3 Pins High Output Voltage Port 2 or 3 Pins High Output Voltage Port 0 or 1 Pins with LDO Regulator Disabled for Port 1 High Output Voltage Port 0 or 1 Pins with LDO Regulator...
  • Page 19 Table 12. 1.71V to 2.4V DC GPIO Specifications Symbol Description Pull Up Resistor High Output Voltage Port 2 or 3 Pins High Output Voltage Port 2 or 3 Pins High Output Voltage Port 0 or 1 Pins with LDO Regulator Disabled for Port 1 High Output Voltage Port 0 or 1 Pins with LDO Regulator...
  • Page 20 DC POR and LVD Specifications Table 13 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 13. DC POR and LVD Specifications Symbol Description Vdd Value for PPOR Trip PORLEV[1:0] = 00b, HPOR = 0 PPOR0 PORLEV[1:0] = 00b, HPOR = 1 PPOR1...

  • Page 21: Ac Electrical Characteristics

    AC Electrical Characteristics AC Chip Level Specifications Table 15 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 15. AC Chip Level Specifications Symbol Description Maximum Operating Frequency Maximum Processing Frequency Internal Low Speed Oscillator Frequency 32K1 Internal Main Oscillator Stability for 24 MHz ±...
  • Page 22 GPIO Pin Output Voltage AC External Clock Specifications Table 17 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 17. AC External Clock Specifications Symbol Description Frequency OSCEXT – High Period – Low Period – Power Up IMO to Switch AC Programming Specifications Table 18...
  • Page 23 Figure 7. Timing Diagram - AC Programming Cycle AC SPI Specifications Table 19 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 19. AC SPI Specifications Symbol Description Maximum Input Clock Frequency Selection, Master SPIM 2.4V<Vdd<3.6V Maximum Input Clock Frequency Selection, Master 1.71V<Vdd<2.4V...
  • Page 24 AC I C Specifications Table 20 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 20. AC Characteristics of the I C SDA and SCL Pins Symbol Description SCL Clock Frequency SCLI2C Hold Time (repeated) START Condition. After this period, HDSTAI2C the first clock pulse is generated.

  • Page 25: Package Diagram

    CY7C604XX Package Diagram This section illustrates the packaging specifications for the enCoRe V LV device, along with the thermal impedances for each package. Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of the enCoRe V LV emulation tools and their dimensions, refer to the development kit.
  • Page 26 CY7C604XX Figure 10. 32-Pin (5 x 5 x 0.55 mm) QFN (001-42168) 001-42168 *C Document Number: 001-12395 Rev *H Page 26 of 30 [+] Feedback...

  • Page 27: Package Handling

    CY7C604XX Figure 11. 48-Pin (7 x 7 x 0.9 mm) QFN (001-13191) 001-13191 *C Package Handling Some IC packages require baking before they are soldered onto a PCB to remove moisture that may have been absorbed after leaving the factory. A label on the package has details about the actual bake temperature and the minimum bake time to remove this moisture. The maximum bake time is the aggregate time that the parts exposed to the bake temperature.

  • Page 28: Ordering Information

    Thermal Impedances Package 16 QFN (24) 32 QFN (24) 48 QFN Solder Reflow Peak Temperature Following is the minimum solder reflow peak temperature to achieve good solderability. Package 16 QFN 32 QFN 48 QFN Ordering Information Ordering Code Package Information CY7C60413-16LKXC 16-Pin QFN (3x3 mm) CY7C64013-16LKXCT 16-Pin QFN (3X3 mm)
  • Page 29 Document History Page Document Title: CY7C604XX, enCoRe™ V Low Voltage Microcontroller Document Number: 001-12395 Orig. of Submission Rev. ECN No. Change Date 626516 See ECN 735721 TYJ/ARI See ECN 1120504 See ECN 1225864 AESA/ARI See ECN 1446763 AESA See ECN 1639963 AESA See ECN...
  • Page 30 Document Title: CY7C604XX, enCoRe™ V Low Voltage Microcontroller Document Number: 001-12395 2653717 DVJA/PYRS 02/04/09 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

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