ASROCK P43ME - V1.1 User Manual page 40

DRAM tRCD
This controls the number of DRAM clocks for TRCD. Min: 3. Max: 10. The
default value is [Auto].
DRAM tRP
This controls the number of DRAM clocks for TRP. Min: 3. Max: 10. The
default value is [Auto].
DRAM tRAS
This controls the number of DRAM clocks for TRAS. Min: 9. Max: 24. The
default value is [Auto].
DRAM tRFC
This controls the number of DRAM clocks for TRFC. Min: 15. Max: 78. The
default value is [Auto].
DRAM tWR
This controls the number of DRAM clocks for TWR. Min: 3. Max: 15. The
default value is [Auto].
DRAM tWTR
This controls the number of DRAM clocks for TWTR. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRRD
This controls the number of DRAM clocks for TRRD. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRTP
This controls the number of DRAM clocks for TRTP. Min: 2. Max: 13. The
default value is [Auto].
DRAM RCOMP and tRD Configuration
BIOS SETUP UTILITY
Advanced
DRAM RCOMP Settings
DRAM CH0 RCOMP Settings : 18-0-10-7-7-7-7
DRAM CH0 RCOMP ODT
[Auto]
[Auto]
DRAM CH0 G0 (Data)
[Auto]
DRAM CH0 G1 (Command)
[Auto]
DRAM CH0 G2 (Control1)
[Auto]
DRAM CH0 G3 (Control2)
[Auto]
DRAM CH0 G4 (Clocks1)
[Auto]
DRAM CH0 G5 (Clocks2)
DRAM CH1 RCOMP Settings : 54-0-8-8-0-8-0
[Auto]
DRAM CH1 RCOMP ODT
[Auto]
DRAM CH1 G0 (Data)
[Auto]
DRAM CH1 G1 (Command)
[Auto]
DRAM CH1 G2 (Control1)
[Auto]
DRAM CH1 G3 (Control2)
[Auto]
DRAM CH1 G4 (Clocks1)
[Auto]
DRAM CH1 G5 (Clocks2)
v02.54 (C) Copyright 1985-2005, American Megatrends, Inc.
DRAM CH0 RCOMP ODT
This controls the number of DRAM CH0 RCOMP ODT. Min: 1. Max: 63. The
default value is [Auto].
DRAM CH0 RCOMP ODT
Value
Min = 1
Max - 63
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