ASROCK G41M-GS3 User Manual page 30

DRAM Timing Configuration
OC Tweaker
DRAM Timing Control
DRAM tCL
DRAM tRCD
DRAM tRP
DRAM tRAS
DRAM tRFC
DRAM tWR
DRAM tWTR
DRAM tRRD
DRAM tRTP
v02.54 (C) Copyright 1985-2003, American Megatrends, Inc.
DRAM tCL
This controls the number of DRAM clocks for TCL. Min: 5. Max: 10. The
default value is [Auto].
DRAM tRCD
This controls the number of DRAM clocks for TRCD. Min: 3. Max: 10. The
default value is [Auto].
DRAM tRP
This controls the number of DRAM clocks for TRP. Min: 3. Max: 10. The
default value is [Auto].
DRAM tRAS
This controls the number of DRAM clocks for TRAS. Min: 9. Max: 24. The
default value is [Auto].
DRAM tRFC
This controls the number of DRAM clocks for TRFC. Min: 15. Max: 78. The
default value is [Auto].
DRAM tWR
This controls the number of DRAM clocks for TWR. Min: 3. Max: 15. The
default value is [Auto].
DRAM tWTR
This controls the number of DRAM clocks for TWTR. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRRD
This controls the number of DRAM clocks for TRRD. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRTP
This controls the number of DRAM clocks for TRTP. Min: 2. Max: 13. The
default value is [Auto].
3 0 3 0 3 0
3 0 3 0
BIOS SETUP UTILITY
DRAM tCL
Value
[Auto]
6
6 [Auto]
Min = 5
6 [Auto]
Max = 10
15
[Auto]
44 [Auto]
6 [Auto]
4
[Auto]
3 [Auto]
4
[Auto]
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