Table of Contents
Advertisement
5.3.3.
::a:h:h:I:o£:Hg:::I:¥:M:: £ mffis. t#e¥.:££:[o::i::::::ed
is used for generating the carrier frequencies in the nrode§ Al and
A2H. A 1.5 kHz shif I comand from the mode control circuit "kes
the syrlthesizer decrease its outpiit frequency by I.5 kHz in these
codes which tneans chat the output frequency of the exciter becomes
the correct tran8ni8sion frequency. The 2.2 kHz oscillator i`s in ed-
dition
used for gelieracing the sidetand in the A2E code giving a
"dulation frequency of 700 Hz.
The keyline output fron the keying circuit to the pover pack infoms
the HT converter to Start when the line goes high. Houever, this
is inhibited if an illegal frequency has been selected.
5.3.4.
The 1.4 mz reference frequency is normlly supplied from the aa8ter
:::::I:::r£:ft::ec:b!3::, I::::::I;a:::::::: [dihe£:e::::::bi: :::
mounting in tbe exciter.
5.4.
Circuit suma
Ere
nthesizer
This frequency synthesizer consists of tuo progratmble phase locked
loops (loop 1 and loop 2), the outputs of which are eoncrollins a
third (loop 3) £ron which the coaplete quthesized Signal i8 derived
and fed to the lsc mixer in the 8igral path.
The output frequency of loop I is coutrolled by the 100 Hz, I kHz,
and 10 kHz infomation according to the coateats of the displays,
provided that the receiving rode chosen is not A1. A2H or F1. If
the A1, A2H or Fl rode i8 chosen the output frequency is decreased
by 1.5 kHz.
Loop 1 produces an output frequency ia 999 steps from 20.000 " to
21.998rmz ia all rodeo but A1, A2H and Fl.
In the A1. A2E and Fl
nodes it i8 fton 19.970 rmh to 21.960 mz. This frequency is divi-
ded by 200 and serves as a varia61e reference frequency for the
Loop Translator.
Indepefldeat of the different receiving rode9 loop 2 i8 coatrolled
by the loo kHz, 1 rmz. and 10 mz info"tion according to the con-
tents of the displays. The output frequency of this loop ia variable
frotD 3.70 mz Co 6.69 rm2 in 299 8tep8 and is fed to the aixer of
the loop translator where ic is subtracted from the 8yntheaizer out-
put f requency divided by 10 and i inally coapared with the variable
reference frequency to this loop by means o£ Phase/Freq. Detector 3.
A Frequency Conparator ensures that the aynthesiger output frequeney
divided 6y ten ig higher than the output frequency o£ loop 2. If this
was not the case, it could lead to a 9cable, unlocked cotldition of
loop 3.
The frequeflcy syathesizer is locked to a I.4 rm2 8igaal derived tram
the TCXO 9o thac the output frequelicy uill exhibit emctly the sam
stability as specified for the TCXO.
5-2
Advertisement
Table of Contents
