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1
DDR1V5
L200
VCC1V5
300@100
TP15
C205
10uF
IC100A
DDR3
A
B25
A_MADR0
A_MADR5
A_MADR0
A7
A_MADR1
A_BA2
A_MADR1
B24
A_MADR2
A_MADR7
A_MADR2
B22
A_MADR3
A_MADR2
A_MADR3
B8
A_MADR4
A_MADR4
C23
A_MADR13
A_MADR5
A_MADR5
A8
A_MADR9
A_MADR6
A_MADR6
A23
A_MADR7
A_MRESETZ
A_MADR7
C8
A_MADR8
A_MADR0
A_MADR8
C24
A_MADR9
A_MADR9
C10
A_MADR10
A_CASZ
A_MADR10
B7
A_MADR11
A_WEZ
A_MADR11
C9
A_MADR12
A_BA0
A_MADR12
A24
A_MADR13
A_MADR3
A_MADR13
A25
A_MRESETZ
A_MRESETZ
A21
A_CASZ
A_MADR4
A_MCASZ
A20
A_MADR12
A_RASZ
A_MRASZ
B21
A_BA1
A_WEZ
A_MWEZ
A11
A_CKE
A_MADR10
A_MCKE
B10
A_ODT
A_MODT
C22
A_BA0
A_MADR11
A_MBADR0
B9
A_BA1
A_MADR1
A_MBADR1
B23
A_BA2
A_MADR8
A_MBADR2
A_MADR6
C20
A_MDATA0
A_MDQL0
C13
A_MDATA1
A_ODT
A_MDQL1
B19
A_MDATA2
A_MDQL2
B13
A_CKE
A_MDATA3
A_MDQL3
B20
A_MDATA7
A_MDATA4
A_MDQL4
A12
A_MDATA5
A_MDATA5
A_MDQL5
C21
A_MDATA6
A_MDATA1
A_MDQL6
B12
A_MDATA7
A_MDQL7
B
B14
A_MDATA8
A_MDATA14
A_MDQU0
C18
A_MDATA9
A_MDATA12
A_MDQU1
C14
A_MDATA10
A_MDATA15
A_MDQU2
B18
A_MDATA11
A_MDATA9
A_MDQU3
B17
A_MDATA12
A_MDQU4
A18
A_MDATA13
A_MDATA6
A_MDQU5
A16
A_MDATA4
A_MDATA14
A_MDQU6
A17
A_RASZ
A_MDATA15
A_MDQU7
A_MDATA0
A13
A_DQML
A_MDQML
C19
A_DQMU
A_MDATA13
A_MDQMU
A_MDATA11
B16
A_DQSL_P
A_DQMU
A_MDQSL
A15
A_DQSL_N
A_MDATA2
A_MDQSLZ
B15
A_DQSU_P
A_MDQSU
C15
A_DQSU_N
A_DQML
A_MDQSUZ
A_MDATA3
B11
A_MCLK_P
A_MDATA10
A_MCLK
A10
A_MDATA8
A_MCLK_N
A_MCLKZ
C25
B_MADR0
B_MADR0
E23
B_MADR1
B_MADR1
D25
B_MADR2
B_MADR11
B_MADR2
Y24
B_MADR3
B_MADR1
B_MADR3
F24
B_MADR4
B_MADR8
B_MADR4
AA23
B_MADR5
B_MADR6
B_MADR5
F23
B_MADR6
B_MADR6
AB23
B_MADR7
B_MADR7
E24
B_MRESETZ
B_MADR8
B_MADR8
AB25
B_MADR0
B_MADR9
B_MADR9
G25
B_MADR2
B_MADR10
B_MADR10
D24
C
B_MADR11
B_MADR11
F25
B_MADR12
B_MADR4
B_MADR12
AB24
B_MADR13
B_MADR12
B_MADR13
D23
B_MRESETZ
B_BA1
B_MRESETZ
W25
B_CASZ
B_MADR10
B_MCASZ
W23
B_RASZ
B_MRASZ
Y23
B_WEZ
B_ODT
B_MWEZ
J25
B_CKE
B_MCKE
H24
B_ODT
B_WEZ
B_MODT
Y25
B_BA0
B_BA0
B_MBADR0
G24
B_MADR3
B_BA1
B_MBADR1
AA24
B_MADR5
B_BA2
B_MBADR2
V23
B_MDATA0
B_BA2
B_MDQL0
K24
B_MDATA1
B_MADR7
B_MDQL1
U24
B_MDATA2
B_MADR13
B_MDQL2
L24
B_MDATA3
B_MADR9
B_MDQL3
V24
B_MDATA4
B_MDQL4
K23
B_MDATA5
B_MDQL5
W24
B_MDATA6
B_MDATA4
B_MDQL6
J24
B_RASZ
B_MDATA7
B_MDQL7
M24
B_MDATA6
B_MDATA8
B_MDQU0
T24
B_CASZ
B_MDATA9
B_MDQU1
L25
B_MDATA10
B_MDQU2
U23
B_MDATA11
B_MDATA3
B_MDQU3
R24
B_MDATA12
B_DQML
B_MDQU4
T25
B_MDATA13
B_MDATA10
B_MDQU5
P25
B_MDATA14
B_MDATA8
B_MDQU6
R25
B_MDATA15
B_MDQU7
B_CKE
L23
B_DQML
B_MDATA7
B_MDQML
U25
B_DQMU
B_MDATA5
B_MDQMU
B_MDATA1
D
P24
B_DQSL_P
B_MDQSL
N25
B_DQSL_N
B_MDATA11
B_MDQSLZ
N24
B_DQSU_P
B_DQMU
B_MDQSU
M25
B_DQSU_N
B_MDATA2
B_MDQSUZ
B_MDATA0
J23
B_MCLK_P
B_MCLK
H25
B_MCLK_N
B_MDATA14
B_MCLKZ
D22
1
B_MDATA12
MVREF
B_MDATA15
TP20
MSD3819TX_BGA20.2x20.2
B_MDATA9
B_MDATA13
1
2
3
DDR15V_A
DDR1V5
C200
C201
C202
C203
100nF
100nF
100nF
100nF
C206
C207
C208
100nF
100nF
100nF
R203
22R
A-MADR5
A-BA2
A-MADR7
A-MADR2
DDR15V_A
R205
22R
A-MADR13
IC201
DDR3/H5TQ1G63BFR
A-MADR9
A-MRESETZ
A-MADR0
R207
22R
A-CASZ
N3
A-WEZ
A-MADR0
A0
P7
A-BA0
A-MADR1
A1
P3
A-MADR3
A-MADR2
A2
N2
A-MADR3
A3
P8
R213
22R
A-MADR4
A-MADR4
A4
P2
A-MADR12
A-MADR5
A5
R8
A-BA1
A-MADR6
A6
R2
A-MADR10
A-MADR7
A7
T8
A-MADR8
A8
R215
R3
A-MADR11
A-MADR9
A9
L7
A-MADR1
A-MADR10
A10
R7
A-MADR8
A-MADR11
A11
N7
A-MADR6
A-MADR12
A12
22R
M2
R209
22R
A-ODT
A-BA0
BA0
N8
A-BA1
BA1
M3
R216
22R
A-CKE
A-BA2
BA2
A-MDATA7
L2
A-MDATA5
/CS
J3
A-MDATA1
A-RASZ
/RAS
K3
A-CASZ
/CAS
L3
R220
22R
A-MDATA14
A-WEZ
/WE
K1
A-MDATA12
A-ODT
ODT
A-MDATA15
M8
A-MDATA9
A-VREFCA
VREFCA
J1
R221
22R
A-MDATA6
NC1
J9
A-MDATA4
NC2
L1
A-RASZ
NC3
L9
A-MDATA0
NC4
M7
NC5
T3
R222
22R
A-MDATA13
A-MADR13
A13
T7
A-MDATA11
NC7
A-DQMU
A-MDATA2
R226
22R
A-DQML
A-MDATA3
A-MDATA10
A-MDATA8
R228
240R 1%
R230
22R
B-MADR11
B-MADR1
DDR15V_B
B-MADR8
B-MADR6
IC202
DDR3/H5TQ1G63BFR
R229
22R
B-MRESETZ
B-MADR0
B-MADR2
N3
B-MADR0
A0
R236
P7
B-MADR4
B-MADR1
A1
P3
B-MADR12
B-MADR2
A2
N2
B-BA1
B-MADR3
A3
P8
B-MADR10
B-MADR4
A4
P2
B-MADR5
22R
A5
R8
R237
22R
B-ODT
B-MADR6
A6
R2
B-MADR7
A7
T8
R232
22R
B-WEZ
B-MADR8
A8
R3
B-BA0
B-MADR9
A9
L7
B-MADR3
B-MADR10
A10
B-MADR5
B-MADR11
R7
A11
N7
B-MADR12
A12
R235
22R
B-BA2
M2
B-MADR7
B-BA0
BA0
N8
B-MADR13
B-BA1
BA1
M3
B-MADR9
B-BA2
BA2
L2
/CS
R239
J3
B-MDATA4
B-RASZ
/RAS
K3
B-RASZ
B-CASZ
/CAS
L3
B-MDATA6
B-WEZ
/WE
B-CASZ
B-ODT
K1
ODT
22R
M8
R241
22R
B-MDATA3
B-VREFCA
VREFCA
B-DQML
J1
B-MDATA10
NC1
J9
B-MDATA8
NC2
L1
NC3
R242
L9
B-CKE
NC4
M7
B-MDATA7
NC5
T3
B-MDATA5
B-MADR13
A13
T7
B-MDATA1
NC7
22R
R245
22R
B-MDATA11
B-DQMU
B-MDATA2
B-MDATA0
R231
22R
B-MDATA14
R249
240R 1%
R248
22R
B-MDATA12
B-MDATA15
B-MDATA9
B-MDATA13
2
3
4
DDR15V_B
TP16
C209
C210
C211
C212
C213
C214
C215
C216
C222
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
D3
A-DQMU
DMU
C7
A-DQSU_P
R210
22R
DQSU
B7
A-DQSU_N
R211
22R
/DQSU
D7
A-MDATA10
DQU0
C3
A-MDATA15
DQU1
C8
A-MDATA12
DQU2
C2
A-MDATA11
DQU3
A7
A-MDATA14
DQU4
A2
A-MDATA13
DQU5
B8
A-MDATA8
DQU6
A3
A-MDATA9
DQU7
E7
A-DQML
DML
F3
A-DQSL_P
R218
22R
DQSL
G3
A-DQSL_N
R219
22R
/DQSL
E3
A-MDATA6
DQL0
F7
A-MDATA3
DQL1
F2
A-MDATA4
DQL2
F8
A-MDATA1
DQL3
H3
A-MDATA2
DQL4
H8
A-MDATA5
DQL5
G2
A-MDATA0
DQL6
H7
A-MDATA7
DQL7
H1
A-VREFDQ
VREFDQ
J7
A-MCLK_P
CK
K7
A-MCLK_N
R250
/CK
K9
A-CKE
NC/150R
CKE
T2
A-MRESETZ
/RESET
R227
56R
D3
B-DQMU
DMU
C7
B-DQSU_P
R233
22R
DQSU
B7
B-DQSU_N
R234
22R
/DQSU
D7
B-MDATA12
DQU0
C3
B-MDATA9
DQU1
C8
B-MDATA14
DQU2
C2
B-MDATA11
DQU3
A7
B-MDATA8
DQU4
A2
B-MDATA13
DQU5
B8
B-MDATA10
DQU6
A3
B-MDATA15
DQU7
E7
B-DQML
DML
F3
B-DQSL_P
R238
22R
DQSL
G3
B-DQSL_N
R240
22R
/DQSL
E3
B-MDATA2
DQL0
F7
B-MDATA1
DQL1
F2
B-MDATA0
DQL2
F8
B-MDATA3
DQL3
H3
B-MDATA6
DQL4
H8
B-MDATA5
DQL5
G2
B-MDATA4
DQL6
H7
B-MDATA7
DQL7
H1
B-VREFDQ
VREFDQ
J7
B-MCLK_P
CK
K7
B-MCLK_N
R251
/CK
K9
B-CKE
NC/150R
CKE
T2
B-MRESETZ
/RESET
R247
56R
4
5
6
R200
1K 1%
A-VREFCA
VCC1V5
TP17
C204
R201
1K 1%
100nF
R202
TP18
A-VREFDQ
1K 1%
TP
C217
R204
100nF
1K 1%
R206
TP19
B-VREFCA
1K 1%
TP
C218
R208
100nF
1K 1%
A_DQSU_P
A_DQSU_N
R212
B-VREFDQ
1K 1%
C219
R214
1K 1%
100nF
A_DQSL_P
A_DQSL_N
22R
A_MCLK_P
R223
22R
A_MCLK_N
R224
R225
56R
C220
10nF
B_DQSU_P
B_DQSU_N
B_DQSL_P
B_DQSL_N
22R
B_MCLK_P
R244
22R
B_MCLK_N
R246
R243
56R
C221
10nF
Title
TP PROJECT
Size
Number
Revision
VSF190R
V4
A2
Date:
08.08.2011
Sheet of
2 OF 9
File:
\\..\200_DDR3_ 32bit.SchDoc
Drawn By:
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A
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