Avtech AV-1002-C-KMP2 Instructions Manual page 13

THEORY OF OPERATION AND BASIC CIRCUITS |
The pulse generator circuits of the AV-1002 family are based largely on low-jitter ECL
integrated circuit and state-of-the-art buffers and operational amplifiers (op amps). This
allows an unprecedented level of integration for pulse generators, and lessens the reliance
on discrete components. Discrete components (i.e. transistors) have been used only in
circuits where no satisfactory substitute was available.
CIRCUIT DESCRIPTION
TRIGGER SOURCES
As shown in the simplified circuit diagram, all of the trigger sources are fed into a
multiplexer. The internal trigger is generated by the 74LS624TTL oscillator (IC2A), whose
output frequency is controlled by the capacitance across pins 3 and 4, and the voltage
on pin 13. The REPETITION RATE RANGE switch changes the capacitor, while the vernier
varies the voltage on pin 13 between OV and 5V. The output of the 74LS624 oscillator is
fed (via a TTL-ECL translator, |C2B) into the 10174 four-into-one multiplexer (IC3). When
the INT/EXT switch is in the INT position, the multiplexer selects the 74LS624 as its output.
When the INT/EXT switch is in the EXT position, the multiplexer will select either the input
that is held at a logic "high", or the external trigger input. If the SINGLE PULSE pushbutton
is not depressed, the external trigger will be selected as the multiplexers output. When the
user presses the SINGLE PULSE pushbutton, the logic "high" input is selected, and the
output goes high, creating a short pulse. The output of this multiplexer then feeds the next
stage of circuitry.
SYNC OUT CIRCUIT
The output of the 10174 multiplexer (IC3) triggers a 10198 one-shot (i.e. a monostable
multivibrator, IC6), on the rising edge of the input pulse. The one-shot then pulses high
for 10ns. The narrow pulse is then translated from ECL to TTL logic levels by a 10H125
level translator (IC7), which feeds a double emitter-follower buffer. This buffer drives a 50Q
resistor in series with the SYNC OUT output. Thus, the SYNC OUT output will have TTL
levels (OV to approx. 3.5V) when driving a high impedance load, and an amplitude of
exactly half that when driving 50Q loads. (The series 50Q resistor provides short circuit
protection.) The SYNC OUT output is available on the SYNC OUT/TRIG IN connector only
when the INT/EXT switch is in the INT position. -K™?2 702. wey Gaw CécKaK
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DELAY CIRCUIT
The output of the multiplexer also feeds another 10198 one-shot (IC5). This one-shot,
however, outputs a pulse of variable width when triggered by the rising edge of the
multiplexer output. The pulse width is controlled by the capacitor between pin 4 and
ground, and the resistance between pin 6 and pin 8 (the -5V power supply). The DELAY
RANGE switch switches in different capacitors onto pin 4, and the vernier is in fact a
potentiometer between pins 6 and 8, plus a minimum resistance, which is switched in by