Line (Z19, page 23),causing synchronization of the TTY with the controller
logic.
The Strobe FF (page 19) sets 4.5 msec after setting of the Clock FF.
After
another 4.5 msec delay, the Clock FF clears.
This generates a 100 nsec Clock
2 pulse which advances the Timing Chain to t2.
During t2, bit 00 of the Holding
Register is transferred to the Printer Line (Z19, page 23).
The clock circuitry cycles once every 9 msec.
With each cycle of the clock
circuitry, the Timing Chain advances one time.
The following table shows the
events which occur with each time generated by the Timing Chain.
tl
t2
t3
t4
t5
t6
t7
t8
t9
tlO
tll
t12
Start Pulse
Holding Reg.
Holding Reg.
Holding Reg.
Holding Reg.
Holding Reg.
Holding Reg.
Holding Reg.
Holding Reg.
Nothing
Timing Chain
Control FF.
Nothing
Table 2-6
bit 00 to Printer Line
bit 01 to Printer Line
bit 02 to Printer Line
bit 03 to Printer Line.
bit 04 to Printer Line
bit 05 to Printer Line
bit 06 to Printer Line
bit 07 to Printer Line
Cleared signal
&
Clear Clock
Timing Chain Events for Write
2-25
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