Circuit Description - Farnell G Series Instruction Book

60 wait switched-mode power supplies
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8
The foll owing is a simplified description of the G60 watt and G120 watt circuit
ope ration and should be read with refe rence to the schematic diagram on page 9
Where component numbers on the 120 watt are different from those on the 60 watt
unit, the latter are quoted in parenthes is.
Power circuits
CIRCUIT DESCRIPTION
The mains input supply is connected through the input fi lter and bridge rectifier
MR101 to reservoir capacitors C301, 302 (C105, 106) . For 115V ope ration MR101
and these capacitors are connec ted as a voltage doubler circuit.
The resulting
d.c. rail of about 340V suppl ies pOwer via current trans former TX102 (TX101) to
à single transistor fo rward converter formed by trans fo rmer TX201 and switch
transistor VT301 (VT101).
The trans fo rmer secon dary vol tage is rectifi ed by D301, 302 (D16, 17) and then
ftltered to produce a d.c. voltage at the output termi nals.
This d.c. voltage is
proportional to the ave rage d.c. leve l of the pulse waveform on the transformer
Soft start
The charging current from the mains into the reservoir capac i tors at switch-on is
limi ted by R101 (R102) and the unit
i nh ibi ted by VT103, C111 (VT3, C8).
The
capaci tor charges slowly when the transis tor turns off and, after a delay, allows
drive pulses to reach the switch trans istor VT301 (VT101).
The unit output is
Voltage control circuit
A proportion of the output voltage is compa red wi th the reference voltage at Z4
(Z6) by the vo l tage cont rol ampl i fier 1C4.
Any difference be tween these two
vol tages is amplified to produce a d.c. control signal which is coupled by opto
isolator 1C3 (1C2) to VT 105 (VT6).
This transistor compares the control signal
wi th a voltage ramp deve loped across C116 (C16). When the ramp vol tage exceeds
the control signal, VT105 (VT6) triggers SCR102 (SCR2) which pulls-off switch
trans istor VT301 (VT101).
Conduction of the switch transistor is initiated by clock pulses generated at a
frequency of about 35kHz by VT101, TX101 (VTI, TX1).
The switch trans i stor is
maintained in conducti on by regene rat i ve feedback from current trans fo rmer TX102
(TX101) until SCR102 (SCR2) conducts.
At this point the switch transistor ceases
to conduct until driven by the next clock pulse.
In this way the conduction time of the switch trans istor, and hence the average
secondary voltage from trans former TX201 can be varied by the d.c. control signal
to stabilise the power supply output voltage.
An overwind on TX201 is used to gene rate the voltage ramp by charging C116 (C16)
through RI18 (R26). The capaci tor is discharged when VT301 (VT101) turns off and
the voltage across TX201 drops.
The clock pulse generator formed by VT101, TX101 (VTI, TX1) is a low power self
oscillating flyback converter whi ch suppl ies power to the voltage control amp lifier.
Also generated are start pulses for the swit ch trans istor and pulses fed to the
pull-off S.C.R. which limit the maximum conduction t ime of the swit ch trans istor
in the absence of any other control signal.
secondary.
es tabl ished and triac T101 is triggered which by-passes R101 (R102) .

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