Clevo P955HQ3 Service Manual page 70

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NVVDD 1
1
2
27,63
GPIO6_NVVDD_PSI#
A
PR286
1V8_AON
PR287
27
GPIO0_NVVDD_PW M_VID
PC16
UP9509_FBDRTN
4700p_50V_X7R_04
PR21
UP9509_REFADJ
6.19K_1%_04
4/26 power
,PC85
PR16
PR8
PC10
309_1%_04
*0.01u_50V_X7R_04
B
PR18
499K_1%_1/16W _04
PW R_SRC_NV
4/26 power
restart
,PC63
PR14
0_04
28,55
GPU_GND_SENSE
PR4
*0_04
HR
28,63
GPU_GNDS_SENSE
PR19
100_04
PR277
PC150
PR13
0_04
*0_04
*33p_50V_NPO_04
28,55
GPU_NVVDD_SENSE
PR7
*0_04
28,63
GPU_NVDDS_SENSE
HR
NVVDD
PR273
100_04
PR279
7/29
0_04
C
PR22
11K_1%_04
1V8_AON
PR301
PH1_UPI_9509
*10K_04
PR304
*0_04
PR293
D
GPIO29_NVVDD_PH1
*30.1K_04
PQ22
G
*MTN2002ZS3
PR298
*10K_04
1
2
3
4
PR290
10K_1%_04
PW R_SRC_NV
1V8_AON
PR26
*10K_1%_04
55
PW R_SRC_NV_VINN_R
*0_04
*0_04
UP9509_VREF
NV_NVVDD_EN
29
PR17
PC23
PC25
*0.01u_16V_X7R_04
20.5K_1%_04
0.1u_10V_X7R_04
PR299
2_1%_04
PR302
PR20
100K_1%_04
restart
4.32K_1%_04
16.5K_1%_04
PC159
0.1u_25V_X7R_06
PC15
place at MOSFET side
4700p_50V_X7R_04
UP9509_FBDRTN
PU9
UP9509_REFADJ
6
24
PH1_UPI_9509
REFADJ
PHASE1
UP9509_VREF
8
23
VREF
LGATE1
9
22
5VCC
TON
PWM3
RT8813DGQW
UP9509_FBDRTN
10
21
5VCC
FBDRTN
PVCC
11
20
FB
LGATE2
12
19
COMP
PHASE2
PR1930
10K_1%_04
PR292
65
PH3_UPI_9509
UGATE2_UPI_9509
2_1%_04
PH2_UPI_9509
PR284
10K_1%_04
PH1_UPI_9509
PR285
10K_1%_04
PC157
PR289
*100K_1%_04
5VS
place at MOSFET side
0.1u_25V_X7R_06
PR23
10K_04
NV3V3
14,29
NVVDD_PW RGD
PR48
Output Voltage Ramp Up Time
Test
15K
150us
1ms
20K
500us
1.5ms
30K
1ms
27
OPEN
1.5ms
2ms
5,27,30,33,36,38,39,42,44,48,50,51,52,53,54,55,56,58,61,62,63,66
3
4
5
6
7
PW R_SRC_NV_FB
PRS1
1
4
2
3
PW R_SRC_NV_VINP_R
55
RL1632T4F-B-R005-FNH
COMMON
1%
1206
PW R_SRC_NV
layout 1pcs B2
2PCS 0805 size
PC153
PC156
PC154
PC151
PC155
1
1
1u_25V_X7R_06
4.7u_25V_X7R_08
4.7u_25V_X7R_08
D1
D1
2
2
1u_25V_X7R_06
4.7u_25V_X7R_08
4.7u_25V_X7R_08
INS148785425
INS148785000
G1
MLP08
G1
MLP08
3
3
COMMON
COMMON
PL5
S1
4
S1
4
CMME063T-R15MS0R907
NV_VDD_L
6
6
2
D2
D2
8
8
7
7
PR307
PQ23
PQ24
4/6 2017
CSD87350Q5D
CSD87350Q5D
PD10
2.2_1%_06
5
G2
5
G2
9
9
S2
S2
PC160
8/5
2200p_50V_X7R_04
HR/HP
PW M3_1
65
PR306
PW R_SRC_NV
layout 1pcs B2
5VS
2.2_06
2/4 power change X7R
PC158
PC171
PC168
1u_16V_X7R_06
1
1
8/5
D1
D1
2
2
INS148785103
INS148784909
3
G1
MLP08
3
G1
MLP08
COMMON
COMMON
PR294
S1
4
S1
4
CMME063T-R15MS0R907
6
6
2
D2
D2
8
8
100K_1%_04
7
7
PQ25
PQ26
PR308
CSD87350Q5D
CSD87350Q5D
PD11
2.2_1%_06
G2
G2
5
5
9
9
PC172
S2
S2
2200p_50V_X7R_04
HR/HP
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
23,28,65
NVVDD
55,63,66
PW R_SRC_NV_FB
12,13,14,27,54,55,63
NV3V3
Title
Title
Title
[64] NVVDD 1 (Power)
[64] NVVDD 1 (Power)
[64] NVVDD 1 (Power)
12,13,32,40,41,49,50,51,52,63,66
5VS
2,11,27,29,42,43,44,45,46,47,49,50,52,53,54,55,57,58
3.3V
13,14,24,25,27,28,29,54,55,63,66
1V8_AON
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P9500-D03
6-71-P9500-D03
6-71-P9500-D03
VDD3
A3
A3
A3
P955HQx
P955HQx
P955HQx
Date:
Date:
Date:
Friday, June 23, 2017
Friday, June 23, 2017
Friday, June 23, 2017
5
6
7
Schematic Diagrams
8
A
PC152
+
30A
NVVDD
1
0.6V~1.2V
"NP-A"
NO PASTEMASK
Sheet 64 of 74
NVVDD 1
B
2PCS 0805 size
9/29
+
C
NVVDD
PL6
30A
1
4/6 2017
D
Rev
Rev
Rev
D03
D03
D03
Sheet
Sheet
Sheet
64
64
64
of
of
of
74
74
74
8
NVVDD 1 B - 65

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