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Schematic Diagrams
Straps and XTAL
A
Strap 2
0
0
0
0
1
1
1
1
0
0
0
0
M
Sheet 25 of 74
M
M
M
Straps and XTAL
1
1
1
B
1
0
M
M
M
M
1
M
Strap 2
0
0
0
1
1
ROM_SO
0
0
0
0
C
1
1
1
1
Strap 5
0
0
0
0
1
1
1
1
1
D
0
0
0
0
M
M
M
M
B - 26 Straps and XTAL
1
2
26
GPU_PLLVDD
30ohm ESR 10mohm bead
40mil
L3
.
HCB1608KF-300T60
1V8_RUN
Near to GPU
C251
C270
22u_4V_X6S_06
4.7u_6.3V_X6S_06
Strap 1
Strap 0
RAMCFG[4:0]
0
0
0 (0x0000)
6GB/8GB
0
1
1 (0x0001)
1
0
2 (0x0002)
GND
1
1
3 (0x0003)
0
0
4 (0x0004)
0
1
5 (0x0005)
1
0
6 (0x0006)
1
1
3GB
7 (0x0007)
0
M
8 (0x0008)
M
0
9 (0x0009)
M
1
10 (0x000A)
1
M
11 (0x000B)
0
0
12 (0x000C)
0
1
13 (0x000D)
1
0
14 (0x000E)
1
1
15 (0x000F)
0
M
16 (0x0010)
M
0
17 (0x0011)
M
1
18 (0x0012)
1
M
19 (0x0013)
M
M
20 (0x0014)
0
M
21 (0x0015)
M
0
22 (0x0016)
M
1
23 (0x0017)
1
M
24 (0x0018)
1 = HIGH : Tied to 1.8V
M
M
25 (0x0019)
M = Middle : Tied to 0.9V
M
M
26 (0x001A)
0 = Low : Tied to 0V
Strap 1
Strap 0
RAMCFG[4:0]
0
0
6GB/8GB
00000
1
0
00010
1
1
00011
1:Enable 0:Disable
1
0
00110
SOR 0/1/2/3 ENABLE
1
1
00111
3GB
ROM_SI
ROM_SCLK
SOR_EXPOSED[3:0]
0
0
1111
0
1
1110
1
0
1101
1= SMB_ALT_ADDR Enable
1
1
1100
0= SMB_ALT_ADDR Disable
0
0
1011
0
1
1010
1= DEVID_SEL Rebrand
0= DEVID_SEL Orignal
1
1
1000
1
M
0000
1= PCIE_CFG Low Power
0= PCIE_CFG High Power
1= VGA_DEVICE Enable
0= VGA_DEVICE Disable
Strap 4
Strap 3
SMB_ALT_ADDR
DEVID_SEL
PCIE_CFG
VGA_DEVICE
0
0
0
0
0
0
1
eDP ID
0
0
0
1
0
0
0
1
1
1
0
1
0
0
0
0
0
1
0
1
GSYNC ID
0
1
0
1
0
0
1
0
1
1
0
1
1
1
1
0
1
1
0
M
1
0
0
M
0
1
0
0
M
1
1
0
1
1
M
1
0
1
0
0
1
1
0
0
1
1
1
0
1
0
1
1
1
1
1
1
1
1
1
2
3
GPU_PLLVDD
20mil
C252
C70
C264
C271
22u_4V_X6S_06
22u_4V_X6S_06
0.1u_10V_X7R_04
0.1u_10V_X7R_04
40mil
GPU under
GPU near
C170
C268
C243
C248
C222
C247
1V8_RUN
R79
*100K_1%_04
XTALSSIN
GPU under
GND
R70
10K_1%_04
GND
C669
10p_50V_NPO_04
GND
MULTI-LEVEL STRAPS
1V8_AON
R75
R76
R77
*100K_1%_04
*100K_1%_04
100K_1%_04
Rc
Re
27
VGA_ROM_SI
27
VGA_ROM_SO
27
VGA_ROM_SCLK
R66
R67
R68
0
100K_1%_04
100K_1%_04
*100K_1%_04
1
Rd
Rf
0
0
1
0
GND
DG P.73
recommend
Pull down resistor 100k
1
0
1
0
1
Setting RAM type
0
Strap
Samsung K4G80325FB-HC25
B-die 0 X 0
1
default
Micron
MT51J256M32HF-80:A
A-die 0 X 1
0
Hynix
H5GQ8H24MJR-R4C
M-die 0 X 2
1
0
1
3
4
5
XTAL
G1S
INS143838181
BGA2152
COMMON
14/23 XTAL/PLL
BD12
SP_PLLVDD
BC12
VID_PLLVDD
GND
U42
GPCPLL_AVDD0
AF11
GPCPLL_AVDD1
BB24
XS_PLLVDD
1V8_AON
R78
*49.9K_1%_04
XTALOUTBUFF
BJ6
BK6
XTALSSIN
XTALOUTBUFF
BL6
BM6
XTALIN
XTALOUT
R69
10K_1%_04
X1
4
3
XTALOUT
GND
XTALIN
1
2
GND
GND
U83-076_27MHZ
C667
fsx3m
6-22-27R00-1BG
10p_50V_NPO_04
6-22-27R00-1BH
XTAL
GND
Zdiff=90
Strap5
eDP
=
Gsync=
1V8_AON
R432
R433
R434
R436
R435
R431
P950HP6,P950HR
VRAM=K4G80325FB-HC03 000
P950HP3= 111
VRAM=K4G41325FC-HC03 111
27
STRAP0
27
STRAP1
27
STRAP2
27
STRAP3
27
STRAP4
27
STRAP5
R425
R426
R427
R429
R428
R424
GND
14,15,24,28,54
1V8_RUN
13,14,24,27,28,29,54,55,63,64,66
1V8_AON
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
4000MHz 256Mx32
4000MHz 256Mx32
Title
Title
Title
[25] STRAPS and XTAL
[25] STRAPS and XTAL
[25] STRAPS and XTAL
4000MHz 256Mx32
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P9500-D03
6-71-P9500-D03
6-71-P9500-D03
A3
A3
A3
P955HQx
P955HQx
P955HQx
Date:
Date:
Date:
Friday, June 23, 2017
Friday, June 23, 2017
Friday, June 23, 2017
Sheet
Sheet
Sheet
25
25
25
4
5
A
B
L
H
C
D
Rev
Rev
Rev
D03
D03
D03
of
of
of
74
74
74
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