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Operation
3.6
LOAD DEVICE VERIFICATION
Load device verification is the part of self-test that is run only before loads and checks to see that
the 990/10A processor is able to communicate with the TILINE device that will be used for loading.
Thus, if the 990/10A processor is unable to successfully complete the load device verification tests,
there is a very high probability that the load will also fail due to hardware malfunction (or operator
error).
Load device verification is run only on TILINE devices. On any other type of device, the load device
verification tests are skipped. The four tests performed during load device verification are:
e
Controller Present Test — Verifies that the TPCS controller registers can be read (no
TILINE timeout occurs on a read from the controller address).
e
Unit Online Test — By reading the TPCS controller registers, verifies that there is a unit
online for that controller.
e
Controller Operational Test — Issues a simple command to the controller and verifies
that it responds as expected.
e
Data Transfer Test — Transfers data, as the loader will, from the load device to memory.
The four least significant
binary bits (rightmost
hexadecimal
digit on the 990 CDM)
are used
to
report the results of the four tests just mentioned. Once a test fails, the remaining tests are not run.
Thus, information is quickly given to the user as to why a
load failed.
3.5.1
Special Features of Load Device Verification
Load device verification test 2 (Unit Online Test) will wait for a unit to come online if no unit is online
when a
load is attempted. This process of waiting is indicated by a 7 as the least significant hexa-
decimal digit on the front panel (a hexadecimal F for an alternate load). This test will wait for a max-
imum of five minutes, then timeout, and report a failure by going to IDLE.
Pressing the halt switch on the front panel at any time during load device verification will cause load
device verification testing to terminate immediately and report a failure. To continue and ignore the
failure, follow the instructions in paragraph 3.4.4.
3.5.2
Understanding Self-Test Error Codes
The self-test error codes are most easily explained by noting that the self-test code was written to
provide maximum
visibility for Field Service personnel using the 990 programmer panel. Figure 3-5
shows this programmer panel and the control display module in juxtaposition. Each hexadecimal
display on the CDM
corresponds to four binary LEDs on the programmer panel. At the beginning of
self-test all the programmer panel LEDs are turned on (hexadecimal code > FFFF on the CDM). Each
front panel bit corresponds to a particular section of testing. After each section of self-test com-
pletes, the corresponding front panel LED is turned off if there is no error.
A successful self-test ex-
ecution
is displayed on the CDM
as >0000
with the POWER
and RUN
LEDs
illuminated and the
FAULT and IDLE LEDs off. A failed self-test has the hexadecimally encoded display of the values of
self-test errors that were not turned off by self-test. The POWER,
FAULT,
and
IDLE
LEDs
will be
illuminated. If more than one self-test error occurs, the CDM
displays the sum of the self-test error
values.
For example,
if both the CRU
chip and the EIA port test failed, the CDM
would
display
> 00CO.
2302633-9701
3-17
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