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General Description
1.3.1.
Microprocessor
The TMS 99000 microprocessor used on the 990/10A is an upwardly compatible, high performance
member of the TMS 9900 family. This microprocessor implements the 990/10 instruction set and an
additional five instructions, providing the capability of a full minicomputer on a single chip.
The following characteristics are offered by the microprocessor.
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Sixteen-bit instruction word
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Memory-to-memory architecture
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77 instructions including signed multiply and divide
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Multiple register files resident in memory
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16 prioritized hardware interrupts
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16 software interrupts
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Programmed input/output (I/O) and direct memory accessing (DMA) capability
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I/O operation addressable in bit, byte, or word increments via the CRU
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Multiprocessor system
interlock signal
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Privileged instructions
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User and supervisor modes
1.3.2
Memory
Four pencil switches select the lower bound of on-board memory in 128-kilobyte increments. This
memory can be accessed by the microprocessor or by any device on the TILINE bus.
The 990/10A is provided with on-board memory in a variety of configurations:
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Two rows of 64 kilobit dynamic random-access memory (DRAM) integrated circuits (ICs)
totalling 256 kilobytes
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Four rows of 64K DRAM
ICs totalling 512 kilobytes
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Eight rows of 64K DRAM surface-mount ICs totalling 1024 kilobytes
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One row of 256K DRAM ICs totalling 512 kilobytes
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Two rows of 256K DRAM
ICs totalling 1024 kilobytes
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Three rows of 256K DRAM ICs totalling 1536 kilobytes
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