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2-1-5.
Transfer of Electric Charge by the H Register
Transfer system of H register employs 2-phase drive of
simple drive circuit, since it enables to get larger area
without limited by picture element as V register.
The electric charges sent to the final stage of the H register
are transferred to the floating diffusion, as shown in Fig.
2-8. PG is turned on at the timing of (1), and the floating
diffusion is charged to the potential of PD. At the timing of
(2), the PG is turned
off. In this condition, the floating
diffusion is floated at high impedance. At the timing of (3),
H1 potential becomes
shallow,
the electric charge now
(1).
Ht
H2
Hi
H2
HtHOG
PG
i ee
ea
"Tf
ocen out
PD
Floating diffusion
>}
(2)
HY
H2
HI
H2
HIHOG
= PG
Pai in Sika Oh en So dears
Tf
~scen OUT
PO
(3)
Hi
H2
Hi
H2
Hi HOG
PG
os iepitts
T—P>—ecep out
~
le.
2
13
moves to the floating diffusion. Here, the electric charges
are converted into voltages at the rate of V=Q/C by the
equivalent capacitance C of the floating diffusion. And PG
is turned on again at the timing of (1) by H1 potential when
deep.
Thus,
the
potential
of floating
diffusion
changes
in
proportion to the quantity of transferred electric charge,
and became CCD output by receiving the source follower.
The equivalent circuit of the output circuit is shown in Fig.
2-9,
(1) a {3)
Ht
ans
T e
rc
ov
Gh
sv
ijqn
oe
LE
i"
La
La
ov
;
a o e
e s
+
;
4
=
Hie
| oP 4g
PG
i
H
came:
Lia
4
ecb ouT
I
'
i
i
j \T PG pulse leak Signal
nN
;
F
~+—— Black level
.
Signa! voltage
Fig. 2-8.
Horizontal Transfer of CCD Imager and Extretion of Signal Voltage
Pre-charge
gate pulse
+B 15V Pre-charge
\
drain bias (PD)
Direction of transfer
—
H Register
S2)
i
Electric
charge
a
Th
Floating diffusion gate Is
Ki
floated at a high impedance.
Voltage output
AY
Cis charged
equivalently
ar
a
Fig. 2-9.
Treory of Signal Extraction Operation
2-1-6. Vertical Overflow Drain (VOFD)
CCD of this system is configured as shown in Fig. 2-10. An
imager which
has OFD
(SUB)
provided
in the vertical
direction
(in the direction
of depth) of a CCD
chip is
referred to as the CCD of vertical overfiow drain (VOFD)
construction.
When
the potential
along the dotted
line
(A-A') is seen from (a), it appears as (b). The height of the
potential barrier is decided by applying DC bias to the OFD
from
outside.
This
is the
same
as
determining
the
saturated electric amount Qs (equals to dynamic range) at
the sensor.
Although the lager Qs are preferable, too large Qs cause a
blooming, etc. (a phenomenon where the electric charge
becomes too large, and jeaks into other picture elements),
and
deteriorates
the
picture
quality.
Therefore,
it is
necessary to apply a well balanced DC bias.
V register
Sensor
cs
(a)
4
1
'
i}
i
N-Si
A
SUB(OFD)
or
iy
1
i
i}
1
1
1
1
V register
Sensor
SUB(OFD)
Sia
I
1
i
1
i
i
'
i
1
i}
1
!
!
!
1
(b)
VSUB=Vi
VSUB=V2
Vi<V2<V3
Fig. 2-10.
VOFD and Potential Chart
V (1/50 sec)
a
behets
1c916 ©
4
F
:
Read pulse sic )
i
Electronic
|
shutter contro! pulse
= __,
(electronic charge
H
Storing time
throwaway pulse}
(1/15625 sec}
(1/50 to 1/15625 sec)
2-1-7. Electronic Shutter
In normal operations, read-out from the signal charge can
be made once in one field. Thus, the store time of the
electric charge is 1/50 sec. However, by throwing away the
electric charge during storing, the actual store time can be
shortened.
(Refer to Fig. 2-11.) The electronic
shutter
needs this kind of electric charge throwaway operation.
As shown
in 2-1-6, in this system, the electric charge
throwaway operation necessary for the electronic shutter is
controfled by the DC bias applied to the OFD.
In other
words,
by setting
the
DC
bias
during
the
throwaway operation to the voltage V3 as shown in Fig.
2-10, the signal charge can be thrown away to the OFD.
Actually,
the throwaway
operation
is done
during
the
horizontal blanking period in order to keep the picture from
any
noise
that
may
appear
during
the
throwaway
operation, Under normal condition, the DC bias of the OFD
is overlapped by an equivalent pulse of V1 to V2. (Refer to
Fig. 2-12.)
In order to keep from any possible noise by the throwaway
electric charge, the charge is distributed, and is not thrown
away with only one pulse.
In theory, it is possible to control an electronic shutter with
a store time of 1/50 sec to 1/15625 sec, in units of every
1/15625 sec interval by above system.
Read-out
Throwaway
Read-out
Soar
tie:
Throwaway period
Actual
storing
time
Fig. 2-11.
Theory of Electronic Shutter
In this system a continuously variable speed shutter is
used. The storing time is the time between the last fall of
the pulse input to Pin © (Trig.) of IC916 from Pin © of the
camera contro! microprocessor (IC932, TC1
Board), and
the next read out pulse. (Refer to Fig. 2-12).
~~— DC bias of OFD
Storing time
(1/50 to 1/15625 sec)
Fig. 2-12.
Actual Electronic Shutter Control
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