Table of Contents
Advertisement
ceed ip LIMIT. The output of A2U4B changes state, initiating
an off pulse.
4 115
As an additional protection feature, if nothing else
resets flip-flop A2U9B (such as the control circuit, over
temperature, dropout, or overvoltage), it will be reset by the
next negative level from A2U5, triggering A2U10B to generate
an off pulse. Therefore, maximum duty cycle is always less
than 50%.
4-116
Bleed Circuit
4-117
This circuit enables the 6034A to regulate properly
even at very low output current and/or voltage levels. The cir¬
cuit conducts approximately 25 milliamperes from the + out¬
put line to the - 8 V supply, thereby ensuring that the FET
switches will be turned on each cycle even if the load is draw¬
ing little or no power. As the output voltage is increased, R31
becomes the predominate path for bleed current.
4-118
Down Programmer
4-119
This circuit allows the output voltage to be lowered
rapidly when required. In order to lower the output voltage it is
necessary to discharge the output filter capacitors (typically,
through the load). In situations that require the output voltage
to drop more rapidly than can be accomplished through the
load, the Down Programmer pulls the output line to a low level
and discharges the capacitors. This action can be triggered by
one of four conditions: The CV Circuit programs a lower out¬
put voltage, an overvoltage is detected on the output, primary
power dropout is detected, or the power supply is disabled.
4-120
A long-carryover bias supply associated with the
Down Programmer stores enough energy to operate the
Down Programmer after loss of primary power. This ensures
that the Down Programmer will be able to discharge the out¬
put circuit completely when primary power is turned off.
4-121
The Down Programmer is disabled by U1A approx¬
imately seven seconds after being triggered. This prevents the
circuit from trying to sink current continuously from a parallel-
connected power supply.
4-122
Overvoltage Protection Circuit
4-123
The Overvoltage Protection Circuit monitors the
output voltage across the + Out Line and circuit common
(- Out Line). If the output, voltage exceeds a preset limit, set by
the OVP Reference circuit on the front panel, the Overvoltage
Protection Circuit inhibits the PWM, triggers the Down Pro¬
grammer and latches itself until the instrument is reset or
turned off.
4-124
The Overvoltage Protection Circuit operates from
the long-carryover bias supply associated with the Down Pro ¬
grammer. By ensuring that the bias voltage remains high until
after the + Out reaches zero volts when the instrument is
turned off, this feature prevents the Overvoltage Protection
Circuit from latching if the unit is turned back on again
immediately after turn off.
4-126
The AC Dropout Detector operates to shut down
the power mesh when primary power is turned off or lost. It in¬
hibits the PWM so that the FETs cannot be turned on in¬
advertently while the control circuits may be dropping out,
and it ensures that the output circuit is completely discharged.
Power dropout is detected by a ramp Circuit that is reset by the
rectified ac pulses in the unregulated + 5 V. If the ramp is not
reset within approximately 20 milliseconds of the previous
reset, the AC Dropout Detector inhibits the PWM and triggers
the Down-Programmer.
4-128
The Bias Voltage Detector inhibits both the PWM and
On Driver when the instrument is turned on until the
internal +5 V supply stabilizes, thus ensuring that the FET
switches cannot turn on before the control circuits are able to
operate. When the instrument is turned on, the outputs of the
bias power supplies begin to rise from 0 volts. When the out¬
put of the + 5 V Regulated supply reaches approximately 1 volt,
transistors in the Bias Voltage Detector turn on and inhibit the
PWM and the On Driver. The inhibit signals remain on until the
output of the + 5 V Unregulated supply exceeds approximate¬
ly +
9
volts, at which point the + 5 V Regulated supply is cer¬
tain to be stablizied.
4-129
The Bias Voltage Detector also inhibits the PWM
and On Driver in "brownout" conditions if the ac line voltage
falls below approximately 70% of nominal.
4-131
Thermostat TS1 is mounted on the FET heatsink in
the fan airflow. If the FET case temperature rises excessively
(from high external air temperature and/or internally generated
heat) TS1 opens arid inhibits the PWM until the temperature
drops. The cooling fan continues to operate.
4-14
Advertisement
Table of Contents
