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IC BLOCK DIAGRAM AND DESCRIPTION
TLC2932IPWLE(High-Performance Phase-Locked Loop)
PW PACKAGE
(TOP VIEW)
LOGIC V
1
DD
SELECT
2
VCO OUT
3
FIN ±A
4
FIN ±B
5
PFD OUT
6
LOGIC GND
7
TERMINAL
I/O
I/O
NAME
NO.
FIN ±A
4
FIN ±B
5
LOGIC GND
7
LOGIC V DD
1
NC
8
PFD INHIBIT
9
PFD OUT
6
BIAS
13
SELECT
2
VCO IN
12
VCO INHIBIT
10
VCO GND
11
VCO OUT
3
VCO V DD
14
VCO V
14
DD
BIAS
13
VCO IN
12
VCO GND
11
VCO INHIBIT
10
PFD INHIBIT
9
NC
8
Terminal Functions
I
Input reference frequency f (REF IN) is applied to FIN ±A.
I
Input for VCO external counter output frequency f (FIN ±B) . FIN ±B is nominally provided from the external
counter.
GND for the internal logic.
Power supply for the internal logic. This power supply should be separate from VCO V DD to reduce
cross-coupling between supplies.
No internal connection.
I
PFD inhibit control. When PFD INHIBIT is high, PFD output is in the high-impedance state, see Table 3.
O
PFD output. When the PFD INHIBIT is high, PFD output is in the high-impedance state.
I
Bias supply. An external resistor (R BIAS ) between VCO V DD and BIAS supplies bias for adjusting the
oscillation frequency range.
I
VCO output frequency select. When SELECT is high, the VCO output frequency is y 1/2 and when low, the
output frequency is y 1, see Table 1.
I
VCO control voltage input. Nominally the external loop filter output connects to VCO IN to control VCO
oscillation frequency.
I
VCO inhibit control. When VCO INHIBIT is high, VCO OUT is low (see Table 2).
GND for VCO.
O
VCO output. When the VCO INHIBIT is high, VCO output is low.
Power supply for VCO. This power supply should be separated from LOGIC V DD to reduce cross-coupling
between supplies.
1
LOGIC V DD (Digital)
SELECT
2
3
VCO OUT
FIN ±A
4
5
FIN ±B
PFD OUT
6
Phase
Comparator
7
LOGIC GND (Digital)
DESCRIPTION
DESCRIPTION
VCO
14
VCO V DD
13
1/2 f osc
BIAS
12
VCO IN
11
VCO GND
10
VCO INHIBIT
PFD INHIBIT
9
8
NC
TX-NR1000
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