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and 3.5MHz
bands from other bands since their 100KHz
low edge digits are not 0.
D42-D45 detect the lower two figures (9.9) and D40 and
D41
detect (9) of the 10KHz
level.
It is necessary to
distinguish these from others since the lower two figures are
reset to 0 when the dial tuning speed button is pushed.
Q6
is the gate for this distinction.
The MHz level and the 100
KHz level of the band edge are determined by the detection
of the (0) and (9), the figures which are chosen according to
the band of the matrix unit and the matrix which composes
the necessary data out of AO-B4 of the output from IC1
in the PLL section "'line''.
Moreover, three kinds of AND
gates with the UD signal are taken out and if they agree
with each other, CKE output is achieved.
If this controls
IC4 Pin 4 and
becomes
the band edge, the CK signal is
stopped.
6-4-6
RIT CONTROL
CIRCUIT
Once the RIT switch is pushed down, Pin 12 and Pin 13
of C27
become
HIGH.
Any chatter from the switch is
absorbed by the delay circuit of R66 and C20.
Also the
two gates of I1C27 are used as inverters and the square pulse
is achieved by the Schmitt trigger circuit. The output from
1C27 Pin 10 goes to [C28 Pin 3 of the CK terminal.
This
IC works as a T type flip-flop so the level is reversed every
time the RIT switch
is pushed.
The signal at Pin 1 of
IC28 (Q output) is fed to Q15 through R62 and turns ON
this transistor.
O15's collector is connected
with
D4, an
LED, so when
Q15 conducts, the LED is lit and indicates
that the RIT circuit is ON.
The LED also indicates the
center of the RIT control.
Also Pin 1 of the [C28 is fed to Pin 6 of 1C27 as well and
it functions
with
the send
signal
HIGH
level
during
receiving, of Pin 5. The output of Pin 4 switches Q9, in the
PLL circuit, and controls the RIT circuit.
6-4-7
DIAL LOCK CIRCUIT
If the dial lock button is pushed, Pin 1 and Pin 2 of 1C27
go LOW.
Any switch chatter is absorbed by R6 and C19.
The output of !C27 inverter is fed to Pin 11 (CK terminal)
of 1C28.
IC28 also works as a T type flip-flop and output
levels are repeated every time the input is applied.
The QO
output from Pin 13 turns O4 ON, through R69, and shows
that the dial lock button has been pushed, by lighting the
dial lock indicator LED, D2. Also Pin 9 and Pin 12 of 1C1,
and Pin 2 of IC2 are connected to 04's collector and they
go to LOW level, so the clock pulses from Q1 and Q2, the
photo transistors, are not fed to the LSI circuit, and the
frequency is locked.
6-4-8
TUNING
SPEED
CIRCUIT
If the tuning speed button is pushed, the input goes to Pin
3 of
!C29
through
C16.
R59
and
C17
absorb any
chattering.
IC29 is also a T type flip-flop.
The OQ output
of Pin 1 is combined
with Q3.
This makes the dial fast
LED indicator, D1, light.
Also, the signal from 1C29 Pin 2
(Q) is sent to the LSI circuit and the Y terminal (Pin 17) of
IC1
in the PLL
unit goes
HIGH,
and so fast tuning is
achieved.
6-5
POWER
UNIT
6-5-1
13.8 VOLT
DC REGULATED
POWER
SUPPLY
CIRCUIT
Voltage supplied to Pin 1 (ground) and Pin 2 (positive) of
the power source connector J6 on the rear panel is fed to
the reverse polarity protection circuit composed of diodes
D9,
D10,
and
Fuse
F1.
This voltage serves
as a direct
power
source for the final amplifier stage of the !C-701.
Power for all other circuits is fed through the power switch
located
on the front panel.
Voltage passing through the
power switch is fed to the PLL unit and distributed to the
13.8 Volt regulated
power supply circuit.
This supply is
composed of transistors Q13 through Q15 in the PA unit
and
will
reduce
a voltage
applied
to the
power
source
connector
to 13.8 Volts when
the voltage exceeds that.
The output voltage of this circuit is fed to the ''B"' unit,
AF power amplifier circuit, dimmer circuit, and at the same
time,
serves
as an input power
source
for each 9 Volt
regulated power circuit.
6-5-2
9 VOLT
REGULATED
POWER
SUPPLY
CIRCUIT
Regulated —9 Volts is produced using the DC-DC converter,
IC2, in the "B'' unit.
The regulated power supply circuit
for +9 Volts is composed
of 040, 042, 043, and D36 in
the "A" unit.
D36 detects the difference between output
voltages and 042 and 043 amplify it. Then 041 controls
the voltage.
The
regulated
9 Volt supply for receive is
taken from the emitter follower circuit of Q37 to the base
of which the 9 Volt standard voltage of D36 is fed.
In the
transmit mode, the base of 037 is connected to ground by
the PTT switch or Q9 through D26 and the output voltage
ceases.
The 9 Volt supply for transmission is taken from
the emitter of Q39, and its base is supplied with the 9 Volt
standard
voltage through
D30.
In the receive mode, the
base of 039 is connected to ground through 038 being ON
and the output voltage ceases.
6-6
OTHER
CIRCUITRY
6-6-1
THERMO-SENSOR
CIRCUIT
This circuit controls forced air cooling for the final stage
of
the
transmitter
when
the
temperature
of the
final
transistors
become
excessively high.
The temperature of
the transistors
is detected
by the POSISTOR
R13 to vary
base bias of Q4.
QO4 and Q5 compose a Schmitt trigger
circuit whose output is amplified by Q6 and Q7 to turn ON
and OFF the DC fan motor.
Another Schmitt trigger circuit
composed
of O8 and QO9 is provided to turn ON
Q10 if
the final stage transistor temperature rises dangerously high.
The
voltage
built
up
by
D6
and
R38
through
Q10
conducted
varies the bias for the constant voltage circuit
in the motor to run it at high speed.
With this high speed,
the fan gives more
air flow through
the heatsink which
keeps the temperature
of the final stage transistors
low
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