Fibocom MG661-EU Hardware Manual
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Fibocom MG661-EU Hardware Manual

Fibocom MG661-EU Hardware Manual

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MG661-EU/LA
Hardware Guide
V1.0

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Summary of Contents for Fibocom MG661-EU

  • Page 1 MG661-EU/LA Hardware Guide V1.0...
  • Page 2 Trademark Statement The trademark is registered and owned by Fibocom Wireless Inc. Other trademarks, product names, service names and company names appearing in this document are owned by their respective owners.
  • Page 3 Contact Information Website: https://www.fibocom.com Address: 10/F-14/F, Block A, Building 6, Shenzhen International Innovation Valley, Dashi First Road, Xili Community, Xili Subdistrict, Nanshan District, Shenzhen Tel: 0755-26733555 Safety Instructions Do not operate wireless communication products in areas where the use of radio is not recommended without proper equipment certification.

  • Page 4: Table Of Contents

    Contents Contents Applicable Model ....................4 Change History ....................5 1 Product Overview ................... 6 1.1 Product Introduction ..................6 1.2 Product Specifications ..................6 1.3 Hardware Block Diagram ................. 8 1.4 Description of Development Board ..............9 2 Pin Definition ....................10 2.1 Pin Attributes ....................
  • Page 5 Contents 3.3.8 LCD Interface ................... 46 3.3.9 Camera Interface ..................46 3.4 Operating Mode ..................... 46 3.4.1 Flight Mode ....................47 3.4.2 Sleep Mode ....................48 3.4.3 PSM Mode ....................49 4 RF Interface ....................51 4.1 RF Indicators ....................51 4.2 RF Antenna ....................
  • Page 6 Contents Appendix C Reference Documents ............... 77 FCC Conformance information ..............78 Requirement per KDB996369 D03..............82...

  • Page 7: Applicable Model

    Applicable Model Applicable Model Applicable Model Description MG661-EU/LA- Support LTE FDD...

  • Page 8: Change History

    Change History Change History V1.0 (2023-06-04) Initial version.

  • Page 9: Product Overview

    The MG661 module is a broadband wireless terminal product applicable to multiple bands for FDD. The following table lists the sub-models of the MG661 product. Table 1. Sub-models of the MG661 module Item MG661-EU-19 MG661-LA-19 LTE FDD Band 1/3/5/7/8/20/28 Band 2/3/4/5/7/8/28/66...
  • Page 10 1 Product Overview Table 3. Baseband characteristics Category Description USB × 1: USB 2.0, can be used for AT communication, capturing log and upgrading software version; I2C × 3: Support standard mode 100KHz and fast mode 400KHz, and the internal software of the module is pulled up by default SPI ×...

  • Page 11: Hardware Block Diagram

    1 Product Overview The above supported interface description is based on the default definition ⚫ of MG661 pins. Some pins in the OPEN version can be reused for other functions. For details, see the GPIO reuse table. The DEBUG_UART function corresponds to pins pin 38 and 39. By default, ⚫...

  • Page 12: Description Of Development Board

    Keypads UART STATUS NET_STATUS Figure 1. Hardware block diagram 1.4 Description of Development Board To help customers develop MG661 modules, Fibocom provides MG661development boards (shared with MC981 series) for controlling or testing modules. For more details, see Fibocom_MC981-CN_ADP User Guide.

  • Page 13: Pin Definition

    2 Pin Definition 2 Pin Definition 2.1 Pin Attributes The following attributes are used to describe pins. Table 5. Pin attributes Attribute Description Pin No. Name Pin Name Direction of pin signal PI: Power Input PO: Power Output DI: Digital Input DO: Digital Output DIO: Digital Input and Output AI: Analog input...
  • Page 14 2 Pin Definition The distribution of pins is shown in the following figure. Figure 2. Pin distribution Keep the NC pin unconnected. ⚫ Connect all GND pins to the ground network. ⚫ The functions of reserved pins 4, 5, 6, 8, 26, 44, 96, 99, 102, 104, 105 ⚫...
  • Page 15 2 Pin Definition Pin79 can be reused as USIM1_DET and SPI_FLASH_CS functions. ⚫ When using external FLASH, SIM hot plug can be implemented by using other GPIO. If the USB_BOOT/KEYIN0 pin is pulled low or high before starting up, ⚫ or the key combined with KEYOUT0 is pressed, the module will enter the download mode.

  • Page 16: Pin Details

    2 Pin Definition 2.3 Pin Details Unused pins are left unconnected. Pins with * indicate that there are notes at the end of the section. Table 6. Power interfaces Pin No. Pin Name Power domain Description Baseband/RF power input (3.4– 42, 43 VBAT 3.4V–4.5V...
  • Page 17 2 Pin Definition Power Description Pin No. Pin Name Domain Pins are internally pulled up to VBAT, and no external pull up is required. If USB_BOOT is pulled down to ground or up to 1.8V, the module will enter the download mode if it is USB_BOOT/KEYIN0 DI 1.8V powered on or reset.
  • Page 18 2 Pin Definition RESET Power Pin No. Description Name VALUE Domain 2, 3, 97, 98 Suspended Table 9. RF interface Power Description Pin No. Pin Name Domain ANT_MAIN Main antenna GRFC_6* 1.8V RF control signal, not recommended GRFC_7* 1.8V RF control signal, not recommended Table 10.
  • Page 19 2 Pin Definition Table 12. SPI interface RESET Power Pin Name Description VALUE Domain SPI_FLASH_CLK DO PD 1.8V SPI clock signal SPI_ SPI data DIO PD 1.8V FLASH_SIO0 transmission SPI_ SPI data DIO PD 1.8V FLASH_SIO3 transmission SPI_ SPI data DIO PD 1.8V FLASH_SIO1...
  • Page 20 2 Pin Definition RESET Power Description Pin Name VALUE Domain hardware pull-up can be reserved, can be suspended when not in use I2C data signal, internal software pull-up, external 1.8V hardware I2C3_SDA 1.8V pull-up can be reserved, can be suspended when not in use Table 14.
  • Page 21 2 Pin Definition RESET Power Pin No. Description Name VALUE Domain (U)SIM power supply, the module USIM1_ 1.8V/3V automatically identifies 1.8V or 3.0V (U)SIM card USIM1_ 1.8V SIM 1 detection (U)SIM data signal line, USIM2_ SIM_DATA has internal pull-up, 1.8V/3V DATA external pull-up can be reserved to SIM_VDD, keep NC first...
  • Page 22 2 Pin Definition RESET Power Pin Name Description VALUE Domain MAIN_DCD DO 1.8V Carrier detection MAIN_DTR 1.8V Data ready Main serial port UART1 data MAIN_TXD 1.8V transmitting Main serial port UART1 data MAIN_RXD DI 1.8V receiving AUX_TXD 1.8V UART1 data transmitting AUX_RXD 1.8V UART6 data receiving...
  • Page 23 2 Pin Definition RESET Power Pin Name Description VALUE Domain hardware pull-up can be reserved, can be suspended when not in use CAM_SPI_CLK DO PD 1.8V CAMERA SPI clock signal CAM_DATA0 DIO PD 1.8V CAMERA MIPI data D0 CAM_DATA1 DIO -- 1.8V CAMERA MIPI data D1 CAM_PWDN...
  • Page 24 2 Pin Definition RESET Description Pin Name Power Domain VALUE (1.8V) LCD analog power supply, with a maximum current of LCD_VDD 2.8 V 100mA, shared with module internal switch, can not be enabled or disabled separately LCD IO interface power supply with a maximum current of 200mA Voltage ranges from...
  • Page 25 2 Pin Definition RESET Power Pin Name Description VALUE Domain KEY input 2, cannot be pulled down externally before boot, otherwise the KEYIN2 1.8V module will enter abnormal download mode KEYOUT6 DO PD 1.8V KEY output 6 KEYIN6 1.8V KEY input 6 KEYOUT1 DO PD 1.8V KEY output 1...
  • Page 26 PIN104/105 GRFC_6/7: RF tuning antenna control interface. If it is necessary ⚫ to use it, please confirm with Fibocom. All RESET VALUEs in the table refer to the corresponding state of the pin of ⚫ the module at RESET instant (during the duration of RESET low level) (at this time, the pin corresponds to the Function 0 in the GPIO multiplexing table), PU represents high level, and PD represents low level.

  • Page 27: Application Interfaces

    3 Application Interfaces 3 Application Interfaces 3.1 Power Interfaces 3.1.1 Electrical Indicators Table 22. Electrical indicators Minimum Typical Maximum Value Unit Indicator Value Value Power VBAT power supply supply voltage Digital input high level Digital input low level Logic level Digital output high level Digital output...

  • Page 28: Power Input

    3 Application Interfaces Minimum Maximum Unit Indicator Value Value Level power supply –0.3 GPIO voltage of digital I/O 3.1.2 Power Input Background The performance of the power supply such as its load capacity, ripple etc. will directly affect the operating performance and stability of the module. If the power supply capacity is insufficient and the power supply voltage instantaneous drops, the module may be powered off or restarted.
  • Page 29 3 Application Interfaces The reference design is shown in the following figure. Figure 4. Reference power supply design Design Description Table 24. Design description Design Consideration Mode Recommended Parameter Use a capacitor with low ESR 220uF x 2, 10uF, 22uF LDO or DCDC power supply requires To reduce power fluctuations Regulating...

  • Page 30: Power Output

    3 Application Interfaces It is recommended to reserve the TVS tube position for the VBAT power supply. Recommended model: ESDH4V5P1/ESD5651N. PCB Design To reduce the equivalent impedance of the VBAT routing, the routing from the external power supply to VBAT is required to be as short and wide as possible (it is recommended that the routing width of VBAT should be at least 2 mm/2A to ensure sufficient power supply capacity).
  • Page 31 3 Application Interfaces Figure 5. Power-on sequence Before pulling down the PWRKEY pin, make sure that the VBAT voltage is stable. It is recommended that the time interval between VBAT power-on and pulling PWRKEY pin down be no less than 30ms, and the time for pulling PWRKEY pin down is recommended to last for 2 s (the minimum time for pulling PWRKEY down is 700ms).

  • Page 32: Power-Off

    3 Application Interfaces Figure 7. Button control reference circuit Automatic power-on design: If the module needs to be powered on automatically, the PWRKEY pin can be connected in series with the resistor to ground (recommended resistance value is 1KΩ or 0Ω). In this way, the module sleep current will increase by about 0.2mA, and the module can only be directly powered off when it is powered down.
  • Page 33 3 Application Interfaces Hardware power-off: The module is powered off when the PWRKEY pin is pulled down for ⚫ at least 3.1s. Software power-off: The module is powered off through the AT+CPWROFF command. This ⚫ mode applies only to non-main control modules. When the module is working properly, do not cut off the power supply of the module immediately to avoid damaging the internal flash and causing data loss.

  • Page 34: Reset

    3 Application Interfaces After the PWRKEY signal is released, the next power-on trigger can be performed at least 5 seconds later. This interval is reserved for the module to perform the shutdown process and release the power of the peripheral circuit connecting with module interface. 3.2.3 Reset Background When the module needs to be restored to its initial state, it can be reset.
  • Page 35 3 Application Interfaces Figure 10. OC/OD drive reset reference circuit Figure 11. Button control bit reference circuit Reset signal is a sensitive signal, so it is recommended to add a debounce capacitor (< 10 nf) close to the module. Software reset ⚫...

  • Page 36: Download

    3 Application Interfaces 3.2.4 Download The MG661 module supports USB download function. To enter the download mode, it is necessary to pull down USB_BOOT to ground or pull up to VDD_EXT, and then power on or reset the module. The module will enter the download mode. It is recommended to pull down USB_BOOT to ground to enter the download mode.
  • Page 37 3 Application Interfaces Schematic Diagram Design The interface circuit design is shown in the following figure. Figure 13. Interface circuit design Since the module supports USB 2.0 High-Speed, it is recommended to use TVS with a capacitance of 0.5 pF on the USB_DM/DP differential signal line. It is recommended to connect a 0-ohm resistor on each USB_DM/DP differential line to facilitate debugging.

  • Page 38: Uart

    3 Application Interfaces If the USB function is not used, you are advised to reserve test points for easy log capture and software upgrade. 3.3.2 UART Background UART is a Universal Asynchronous Receiver/Transmitter. It converts a parallel input signal into a serial output signal. UART is generally used to communicate with PCs, including monitoring debuggers and other devices, such as EEPROM.

  • Page 39: I2C

    3 Application Interfaces Figure 14. Reference circuit 1 for serial port level conversion Figure 15. Reference circuit 2 for serial port level conversion The level conversion circuits do not apply to applications whose baud rate exceeds 460Kbps. Pay attention to TX/RX and CTS/RTS connection. The pull-up resistor of the serial port level conversion circuit of triode or MOS tube is recommended to be 10K.

  • Page 40: Pcm/I2S

    3 Application Interfaces The I2C bus is a simple, bidirectional two-wire synchronous serial bus. It only requires a data line and a clock line to transfer information between devices connected to the bus. It is mainly used in the communication between multiple integrated circuits (ICs) in the system. Schematic Diagram Design The module I2C interface has been pulled up by software by default, and external hardware pull-up is required to be reserved.
  • Page 41 3 Application Interfaces The module digital voice interface supports I2S and PCM transmission standards. Schematic Diagram Design According to the corresponding connection of the reference design of the codec chip used, the power supply and IO level are required to meet the requirements of the codec chip and match the module.

  • Page 42: Sim

    3 Application Interfaces sensitive signals to avoid interference. 3.3.5 SIM Background The module can be connected to the network only after the SIM card is inserted. The module supports 1.8 V and 3 V SIM cards. Schematic Diagram Design There are the following scenarios: SIM card slot with detection signal: supports detection of SIM card insertion and removal, ⚫...
  • Page 43 3 Application Interfaces MODULE SIM_CONNECTOR USIM_VDD USIM_RESET USIM_PRESENCE USIM_CLK DATA USIM_DATA RV1-RV5 Recommend EGA10402V05A2 Figure 18. Normally opened SIM card slot USIM_DATA has internal pull-up inside the module, and external pull-up can be reserved to keep NC. The recommended model for RV1 to RV5 is EGA10402V05A2.
  • Page 44 3 Application Interfaces The filter capacitor and ESD device of SIM signal cable are placed close to the SIM card ⚫ slot. Less than 11pF capacitor is recommended for ESD device. Routing points: To reduce EMC problem, keep SIM signal line away from RF cable, power line, clock line ⚫...
  • Page 45 3 Application Interfaces information. When the USIM_PRESENCE is at a low level, the module determines that the (U)SIM card is removed and does not read it. The SIM card hot plug function can be configured by running the AT+MSMPD command. The AT commands are described as follows.

  • Page 46: Adc

    3 Application Interfaces RF coupling will cause interference to GND. Adjust the capacitance values of capacitor ◦ and ESD components or even remove the capacitor (if it is necessary) to avoid the interference. PCB crosstalk: ⚫ Reason: Other signal line on the main board has crosstalk with the SIM signal through the PCB ◦...

  • Page 47: Status Indication

    3 Application Interfaces It is recommended to ground ADC signal lines to improve ADC voltage measurement accuracy. 3.3.7 Status Indication Background Table 27. Status indication pin Power Description Pin No. Pin Name Domain NET_STATUS 1.8V Network status indication STATUS 1.8V Operating status indication The PIN16 of the MG661 module is the network status indication signal interface.
  • Page 48 3 Application Interfaces High level Sleep status Schematic Diagram Design The reference circuit of network status indicator is shown in the following figure. VBAT Module 2.2K 4.7K NET_STATUS Figure 19. Network status indicator reference circuit Please reserve the 4.7K and 47K positions for voltage division to ensure that the voltage of the triode V is less than the starting voltage of the triode in startup, reset and wake up scenarios, and avoid power consumption increase caused by LED work.

  • Page 49: Lcd Interface

    3 Application Interfaces VBAT 2.2K 4.7K STATUS Figure 20. Reference circuit of STATUS operating status 3.3.8 LCD Interface The MG661 module provides a set of LCD interface. The LCD interface supports a module with the maximum resolution of 240×320 (QVGA) @30fps LCD display and support 3-wire 9bits and 4-wire 8 bits SPI mode data transmission.

  • Page 50: Flight Mode

    3 Application Interfaces Table 30. Operating modes Operating Mode Description The module is powered on, and it can be operated using the AT commands through the serial port. The module is registered with the Standby mode network, there is no service processing in progress, and the module is (IDEL) ready for communication.

  • Page 51: Sleep Mode

    3 Application Interfaces Send AT+GTFMODE=1 to enable flight mode control. When the W_DISABLE# pin is pulled high or suspended, the module is in the normal mode; when the pin is pulled low, the module enters the flight mode. Software control: ⚫...

  • Page 52: Psm Mode

    3 Application Interfaces command. x=0: Wake up the module by level. The module enters wake-up mode when WAKEUP_IN is pulled down and enters sleep mode at high level. x=1: Wake up the module by level. The module enters wake-up mode when WAKEUP_IN is pulled up and enters sleep mode at low level.
  • Page 53 3 Application Interfaces Exiting the PSM mode: 1. Wake up through the PSM_EXT_INT pin, and active at high level. 2. Wake up by a PWRKEY button. 3. Wake up by TAU. "*" indicates that the PSM function of the MG661 module is being debugged. PSM_EXT_INT is a PSM wake-up pin.

  • Page 54: Rf Interface

    4 RF Interface 4 RF Interface 4.1 RF Indicators Table 31. RF indicators Indicator Description Operating band LTE FDD: B1/2/3/4/5/7/8/20/28/66 Uplink: QPSK/16QAM Modulation Downlink: QPSK/16QAM/64QAM LTE system Transmitting 23±2dBm power Peak rate LTE FDD: 10.296Mbps DL/5.160Mbps UL (Cat 1) Table 32. Transmitting power of each band System Band Tx Power (dBm) Description...
  • Page 55 4 RF Interface Table 33. Receiving sensitivity at each band System Band Sensitivity (dBm) Description Band 1 -98.0 10MHz Bandwidth Band 2 -98.0 10MHz Bandwidth Band 3 -98.0 10MHz Bandwidth Band 4 -97.5 10MHz Bandwidth Band 5 -98.0 10MHz Bandwidth LTE FDD Band 7 -97.0...
  • Page 56 4 RF Interface Average Parameter Current (mA) LTE FDD Paging cycle #128 frames (remove USB) LTE FDD Paging cycle #128 frames (USB suspend) LTE FDD Paging cycle #256 frames (remove USB) LTE FDD Paging cycle #256 frames (USB suspend) LTE FDD Paging cycle #64 frames (USB in place) IDLE LTE FDD...

  • Page 57: Rf Antenna

    4 RF Interface 4.2 RF Antenna 4.2.1 Antenna Introduction Antenna interface The module only has RF antenna pad. The RF cable can be connected to the antenna after PCB design of the RF signal line. Antenna classification According to the transmitting and receiving functions, it mainly includes: Main antenna: The antenna is divided into built-in and external antenna, which is ⚫...
  • Page 58 4 RF Interface implemented in two ways: microstrip route and coplanar waveguide. To illustrate the design principles, the following figures show the structural designs of microstrip route and coplanar waveguide when the impedance line is at 50Ω. Microstrip cable complete structure ⚫...
  • Page 59 4 RF Interface Figure 23. Four-layer PCB coplanar waveguide structure (see ground layer 3) Figure 24. Four-layer PCB coplanar waveguide structure (see ground layer 4) In the design of RF antenna interface circuit, in order to ensure good performance and reliability of the RF signal, it is recommended to observe the following principles: The impedance simulation tool should be used to accurately control the RF signal cable at ⚫...

  • Page 60: Antenna Passive Test

    4 RF Interface the signal pin should be kept at a certain distance from the ground. The reference ground plane of the RF signal cable should be kept intact; adding a certain ⚫ amount of ground holes around the signal and the reference ground can improve the RF performance;...
  • Page 61 4 RF Interface sensitivity. Figure 26. Network analyzer and anechoic chamber You will need: Universal radio communication tester, spectrum analyzer and anechoic chamber. Test items: TRP, TIS and directionality. Antenna system is determined by the whole device, and the antenna is just an important part of the whole device.
  • Page 62 4 RF Interface TRP test Spectrum Analyzer Measurement Sig nal Path Receive Mo bile Universal Radio Ant enna Phone Co mmunication Tester Relay Switch Unit GPIB-Bus MAPS Controller Figure 27. TRP test TIS (Total Isotropic Sensitivity): reflects the receiving sensitivity of the entire radiation sphere. It reflects the reception of the whole device;...

  • Page 63: Reliability

    5 Reliability 5 Reliability 5.1 Temperature and Humidity Requirements Table 35. Environment indicators Indicator Description Operating The module works normally within this temperature: temperature range, and the related performance –30℃ to +75℃ meets the requirements of 3GPP standards. The module works normally within this temperature range, and the baseband RF function Extended is normal.
  • Page 64 5 Reliability the standard test items and test conditions. Table 36. Industrial reliability test Test Item Test Condition High temperature 85℃, 168H/504H/1008H aging High temperature and 85℃ , 85%RH, 168H/504H/1008H humidity High and low temperature, high and low humidity, high and low Corner test voltage, six groups of combinations, and each combination runs for 24 hours...

  • Page 65: Esd Indicators

    5 Reliability Test Item Test Condition Sweep frequency: 0.5 Octave/min, linear; Each axis: 2H; Salt spray Neutral salt spray, 48H 5.3 ESD Indicators The module is ESD sensitive component, and the ability to resist static electricity is weak. So ESD precautions that apply to ESD sensitive components should be strictly followed. Proper ESD procedures must be applied throughout the processing, delivery, assembly and operation.

  • Page 66: Thermal Design

    6 Thermal Design 6 Thermal Design 6.1 Overview The design guidelines provided in this document are general guidelines. There may b e unavoidable differences between different products. When designing a specific interf ace circuit, please pay attention to the specific characteristics of the hardware and so ftware of the module.

  • Page 67: Thermal Design

    6 Thermal Design Thermal convection Convective heat dissipation is an energy exchange in which a fluid flows over a solid surface. Heat sink/shell with larger surface area dissipates heat better. 6.3 Thermal Design 6.3.1 Main Board Recommendations for main board design: Increase PCB size, and keep the module away from other heat source devices.

  • Page 68: Product Structure

    6 Thermal Design Figure 30. PCB stack Figure . PCB hole comparison 6.3.2 Product Structure Recommendations for structure design: Reduce the distance between module and heat sink and shell. Thermal conductive material thickness should not exceed 3 mm. The thermal conduction path is shown in the following figure. Hot air Radiator Shield...
  • Page 69 6 Thermal Design Allow direct contact between the heat sink and thermal conductive material on the module if the heat sink can be exposed to the product surface. Consider convection if the product has cooling holes.

  • Page 70: Structure Specifications

    7 Structure Specifications 7 Structure Specifications 7.1 Appearance The schematic diagram of MG661 module is as follows: Figure 33. TOP schematic diagram...

  • Page 71: Dimensions

    7 Structure Specifications Figure 34. Bottom schematic diagram 7.2 Dimensions Table 38. Packaging mode Indicator Description Weight 1.2g Package LGA, with 109 pins in total Appearance dimensions (17.7± 0.15) mm × (15.8± 0.15) mm × (2.4± 0.2) mm Structure dimensions See the following figure.
  • Page 72 7 Structure Specifications Figure 35. Structural dimensions (top view/side view/bottom view)

  • Page 73: Packaging And Production

    8 Packaging and Production 8 Packaging and Production 8.1 Packaging The module adopts tape packaging, and the storage, transportation and the usage of module can be protected to the greatest extent. Please read the instructions carefully to avoid damaging the product. The product packaging is divided into three layers: Outer packaging ⚫...
  • Page 74 8 Packaging and Production Figure 36. Tape packaging process Description: 1. Place a module into the carrier tape slot in sequence according to the specified direction, and seal the heat sealing film. 2. Place the specified number of module tapes, as shown in the following figure. 3.
  • Page 75 8 Packaging and Production 7. Seal the top of the outer box in an I-shape, paste an outer box label in the rectangular frame on the side, and paste a box sealing label on the top and bottom parts of the outer box respectively.

  • Page 76: Storage

    8 Packaging and Production Figure 38. Reel dimensions 8.2 Storage Storage conditions (recommended): temperature is 23±5° C; relative humidity is 35–70%. Storage period (sealed vacuum packaging): 12 months under the recommended storage conditions. 8.3 SMT For module stencils design, solder paste and oven temperature control, see Fibocom_MG661_SMT Application Design.

  • Page 77: Appendix A Acronyms And Abbreviations

    Change History Appendix A Acronyms and Abbreviations Acronym and Description Abbreviation Analog to Digital Converter Application Development Platform Bluetooth Customer Premises Equipment DCDC Direct Current to Direct Current Double Data Rate EDGE Enhanced Data rate for GSM Evolution Electronic Static Discharge Frequency Division Duplexing Front End Module GPRS...
  • Page 78 Change History RMII Reduced Media Independent Interface SDIO Secure Digital Input and Output Subscriber Identification Module Serial Peripheral Interface Time Division Duplexing UART Universal Asynchronous Receiver Transmitter Universal Serial Bus WCDMA Wideband Code Division Multiple Access WLAN Wireless Local Area Network...

  • Page 79: Appendix B Reference Standards

    Change History Appendix B Reference Standards This product is designed with reference to the following standards: 3GPP TS 51.010-1 V10.5.0: Mobile Station (MS) conformance specification; Part 1: ⚫ Conformance specification 3GPP TS 34.121-1 V10.8.0: User Equipment (UE) conformance specification; Radio ⚫...
  • Page 80 Change History Appendix C Reference Documents This product is designed by referring to the following documents: Fibocom_Design Guide_RF Antenna ⚫ Fibocom_MC981_ADP_User Guide ⚫ Fibocom_MC66x/MG66x_AT Commands User Manual ⚫ Fibocom_MG661_SMT Application Design ⚫...
  • Page 81 Fibocom Wireless Inc. that they wish to change the antenna trace design. In this case, a Class II permissive change...
  • Page 82 Change History window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: “Contains FCC ID:ZMOMG661LA” The FCC ID can be used only when all FCC compliance requirements are met.
  • Page 83 Change History equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation.
  • Page 84 Change History This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required.
  • Page 85 Change History Requirement per KDB996369 D03 2.2 List of applicable FCC rules List the FCC rules that are applicable to the modular transmitter. These are the rules that specifically establish the bands of operation, the power, spurious emissions, and operating fundamental frequencies.
  • Page 86 Change History 2.4 Limited module procedures If a modular transmitter is approved as a “limited module,” then the module manufacturer is responsible for approving the host environment that the limited module is used with. The manufacturer of a limited module must describe, both in the filing and in the installation instructions, the alternative means that the limited module manufacturer uses to verify that the host meets the necessary requirements to satisfy the module limiting conditions.
  • Page 87 Change History dielectric constant, and impedance as applicable for each type of antenna); b) Each design shall be considered a different type (e.g., antenna length in multiple(s) of frequency, the wavelength, and antenna shape (traces in phase) can affect antenna gain and must be considered);...
  • Page 88 Change History needed for the host product manufacturer to provide to end users in their end-product manuals. If RF exposure statements and use conditions are not provided, then the host product manufacturer is required to take responsibility of the module through a change in FCC ID (new application).
  • Page 89 Change History 2.8 Label and compliance information Grantees are responsible for the continued compliance of their modules to the FCC rules. This includes advising host product manufacturers that they need to provide a physical or e- label stating “Contains FCC ID” with their finished product. See Guidelines for Labeling and User Information for RF Devices –...
  • Page 90 Change History 2.10 Additional testing, Part 15 Subpart B disclaimer The grantee should include a statement that the modular transmitter is only FCC authorized for the specific rule parts (i.e., FCC transmitter rules) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification.

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