Internal/External Frequency Standard; Internal/External Selection; Frequency Standard Division - Racal Instruments 9057 Technical Manual

Frequency period meter
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5.6
IC1 is a decade divider, the output of which is buffered by Q12. C29 and R42
integrate the signal from Q12 to generate pulses at the output (pin 4) of the p.c.b.
CONlROL ASSEMBLY 19-0608 Fig. 4. 5
I nterna 1/Externa I Frequency Standard
5.7
The output of the 5 MHz internal frequency standard oscillator Model 9440
connects to pin 22 of the p.c.b. and thence to the base of Q1. Q1 and Q3
form an amplifier and wave shaping network to provide a square wave to pin 1 of the divide
by five integrated circuit IC1. IC1 divides the
5
MHz signal from the oscillator down to 1 MHz.
5.8
The 1 MHz reference is available at pin36 for external use via the front panel
frequency standard socket when Internal Standard is selected.
5. 9
The input from a 1 MHz externa I frequency standard appears at pin 17 of the p. c. b.
Q2 and Q4 amplify and shape the signal to produce a square wave output to IC2d.
Internal/External Selection
5.10
With the internal/external switch set to INTERNAL pins 34 and 35 are linked
providing a path for the 5V supply through R15 to earth. Pin 35 of the p.c.b.
and pins 1 and 2 of IC2a are at logic '0', pin 12 of IC2d is at logic '0'.
5.11
logic '0' at pin 12 of IC2d closes IC2d gate...f'hus inhibiting the 1 MHz output from
the external frequency standard. The logic '0' state at pins 1 and 2 of IC2a result
in a logic '1' output at pin 3 of IC2a and pin 5 of IC2b which opens IC2b gate. As IC2c
gate is open due to logic '0' on pin 12 of IC2d the 1 MHz signal from IC1 passes through
IC2b and IC2c to pin 1 of IC3.
5.12
With the internal/external switch in the EXTERNAL position pin 34 and 35 of the
p.c.b. are open circuit. Pin 35 is at logic '1' (no current flow through R5)
therefore pins 1 and 2 of IC2a are at logic '1' and pin 12 of IC2d at logic '1'.
5.13
The logic '1' state at pins 1 and 2 of IC2a results in a logic '0' state at the output
of IC2a and pin 5 of IC2b which closes IC2b gate and inhibits the 1 MHz signal
from IC1. IC2c gate is open due to logic '0' on pin
5
of IC2b and as IC2d gate is open due
to logic '1' on pin 12 the signal from the 1 MHz external frequency standard passes through
IC2d and IC2c to pin 1 of IC3.
Frequency Standard Division
5.14
IC3, IC4, IC5 and IC6 are decade dividers which divide the 1 MHz from either
frequency standard to provide 100 Hz clock pulses for frequency measurement at
pin 11 of IC6.
5-2
9057/9059

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