Nice Z80+ Operation Manual page 82

V
sa,
la, da
x
X?
EORx
DOR
RO
RW
PR x, yyyy ,zzzz
PRE xxxx,yyyy
PRH
PRO xxxx
PS xxxx
DPR
SBM mode
EBP x( ,yyyy(,zzzz))
DBP
x/ALL
BPC x,yyyy
EPP x
DPP x/ALL
Quit Mode Only (continued)
Verify that the target system memory is the same beginning
at a given start address (sa) and ending at the last address
(la) to the data block starting at the destination address
(da).
Display all the Z80+ internal registers and flags.
Display and allow modification of the specified Z80+
internal registers. ? can be any one of the given registers:
? = F, F', A, A', B, B', D, D', H, H', S, P, X, Y, I
Enable
8K
overlay
RAM
(at base address xOOO).
Disable
8K
overlay
RAM.
Set
8K
overlay
RAM
to read-only status.
Set
8K
overlay to read-write status (default).
Set performance monitoring bucket x to address range yyyy
thru zzzz.
Set all performance monitoring buckets evenly over address
range xxxx thru yyyy.
Set all performance monitoring buckets evenly over the
address range defined by the current bucket with the highest
activity.
Do performance monitoring starting at address xx xx.
Set performance monitoring sample counter to xxxx.
Display last performance monitoring chart.
Set hardware breakpoint mode. Modes are:
M, MR, MW,
Ml,
I, IR, IW, DB.
Enable hardware breakpoint x (at address yyyy) and set pass
counter to zzzz. Default pass counter to 0.
Disable hardware breakpoint x
I
ALL breakpoints.
Set hardware breakpoint x pass to counter to yyyy.
Enable hardware printpoint x.
Disable hardware printpoint x
I
ALL printpoints.