Epiq Solutions Sidekiq Mini PCIe Hardware User Manual

Epiq Solutions Sidekiq Mini PCIe Hardware User Manual

Rf transceiver

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Sidekiq™ Mini PCIe
RF Transceiver • Low SWaP
HARDWARE USER MANUAL
V1.4 - DECEMBER 03, 2021

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Summary of Contents for Epiq Solutions Sidekiq Mini PCIe

  • Page 1 Sidekiq™ Mini PCIe RF Transceiver • Low SWaP HARDWARE USER MANUAL V1.4 - DECEMBER 03, 2021...
  • Page 2 Sidekiq™ Mini PCIe | Hardware User Manual CHANGELOG Revision Date Description Author 2014-04-02 Initial version Barry L 2014-05-02 Updates with substantially more technical details Barry L 2014-05-09 Added JTAG section Barry L -Corrected reference to SMBus interface on MiniPCIe edge connector (lines aren't 2014-05-17 hooked up by default) -Swapped Xilinx/Digilent JTAG header pins on JTAG board Barry L...
  • Page 3 Epiq Solutions is disclosing this document (“Documentation”) as a general guideline for development. Epiq Solutions expressly disclaims any liability arising out of your use of the Documentation. Epiq Solutions reserves the right, at its sole discretion, to change the Documentation without notice at any time. Epiq Solutions assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates.
  • Page 4: Table Of Contents

    Sidekiq™ Mini PCIe | Hardware User Manual TABLE OF CONTENTS ..................6 Introduction .
  • Page 5 Sidekiq™ Mini PCIe | Hardware User Manual ..................29 JTAG Access on Sidekiq .
  • Page 6: Introduction

    Sidekiq™ Mini PCIe | Hardware User Manual Introduction INTRODUCTION This document provides an overview of Epiq Solutions' Sidekiq SDR [1], a MiniPCIe card with integrated RF tuner, FPGA, and PCIe/USB interfaces to a host. The following topics will be discussed:...
  • Page 7: Legal Considerations

    Many countries, including the United States, prohibit the transmission and reception of certain frequency bands, or receiving certain transmissions without proper authorization. Again, the user is solely responsible for the user's own actions. Epiq Solutions Proprietary Page 7...
  • Page 8: Proper Care And Handling

    Proper Care and Handling PROPER CARE AND HANDLING The Sidekiq unit is fully tested by Epiq Solutions before shipment, and is guaranteed functional at the time it is received by the customer, and ONLY AT THAT TIME. Improper use of the Sidekiq unit can cause it to become non-functional.
  • Page 9: Overview

    System level block diagram of the platform Overview of the externally accessible hardware ports Powering the system up and down All documentation and support for Sidekiq is provided through Epiq Solutions' support website which can be found at: https://support.epiqsolutions.com Please note that it is necessary to register prior to accessing the relevant information for your purchase.
  • Page 10: References

    Sidekiq™ Mini PCIe | Hardware User Manual References REFERENCES 1. Sidekiq Product Page https://epiqsolutions.com/rf-transceiver/sidekiq 2. Epiq Solutions Support Page https://suppport.epiqsolutions.com 3. Lenovo Group, Ltd https://lenovo.com 4. Dell, Inc https://dell.com 5. Expresscard Wikipedia Page https://en.wikipedia.org/wiki/ExpressCard 6. Expresscard-to-MiniPCIe Adapter Product Page https://www.mfactors.com/products/PE3B-252d-Mini-PCIe-Card-to-ExpressCard-adapter.html 7.
  • Page 11 Micro miniature RF coax connector, manufactured for use as the antenna interface on M.2 cards megahertz MIMO Multiple Input Multiple Output millisecond Platform Development Kit Pulse Per Second Parts Per Million Radio Frequency Receive Software Development Kit Software Defined Radio TCVCXO Temperature Compensated Voltage Controlled Crystal Oscillator Epiq Solutions Proprietary Page 11...
  • Page 12 Sidekiq™ Mini PCIe | Hardware User Manual Terms and Definitions Time-division duplex Transmit UART Universal Asynchronous Receiver Transmitter Universal Serial Bus W.FL Micro-Miniature RF coaxial connector manufactured by Hirose Table 1: Terms and Definitions Epiq Solutions Proprietary Page 12...
  • Page 13: System Overview

    SKIQ-002 supports operation as a 1x1 RF transceiver (with one RF transmitter and one RF receiver) For the purposes of this document, the remaining documentation will be in reference to SKIQ-001. A block diagram of Sidekiq is shown in the figure below. Epiq Solutions Proprietary Page 13...
  • Page 14 Sidekiq™ Mini PCIe | Hardware User Manual System Overview Figure 1: Block diagram of the Sidekiq MiniPCIe card Epiq Solutions Proprietary Page 14...
  • Page 15: Hardware Specification

    0 to 89.75 dB, 0.25 dB steps RF Output Power +13 dBm < 2 GHz, +10 dBm above 2 GHz D/A Converter Sample Rate 200 Ksamples/sec to 61.44 Msamples/sec D/A Converter Sample Width 12 bits Epiq Solutions Proprietary Page 15...
  • Page 16: Hardware Specification

    Component -30 deg C* to + 85 deg C *Operation down to -40 deg C is supported, though the TCVCXO will Temperature Rating operate outside of the +/- 1PPM accuracy specification. Table 4: Hardware Specs Epiq Solutions Proprietary Page 16...
  • Page 17: Hardware Interfaces

    MiniPCIe are already pre-wired with antennas that terminate with a U.FL plug connector. This Rx port supports RF input frequencies between 70 MHz and 6 GHz. The libsidekiq software library RxA1 handle (sidekiq_rx_hdl_A1) is mapped to the Rx1 interface. TX1 / RX2 Epiq Solutions Proprietary Page 17...
  • Page 18: User Led #1

    EXTERNAL 1PPS INPUT The External 1PPS Input interface is a W.FL jack connector that allows an external 1PPS signal to be brought in to the on-board FPGA (2.5V logic-level) on Sidekiq for use in time synchronization. A Epiq Solutions Proprietary Page 18...
  • Page 19: External Reference Clock Input

    40 MHz TCVCXO, and to accept the external 40 MHz reference clock input. Contact Epiq Solutions for details. RevC Sidekiq and beyond provide a means to switch between the on-board reference clock and external reference clock through the libsidekiq software API.
  • Page 20: Sidekiq Accelerometer & Temperature Sensor

    RESET_ signal for Dropkiq HF/VHF low frequency Ground extension card Not connected by default (to prevent I2C Ground SMB_CLK address conflicts with host) PCIe differential COEX2 GPIO routed to FPGA pin J6, 2.5V I/O PETn0 transmit lane 0, negative Epiq Solutions Proprietary Page 20...
  • Page 21 1.5V Unused (floating) PCIe differential -GPIO routed to FPGA pin H3, 2.5V I/O-Used PERn0 receive lane0, negative RESERVED2* as SPI MISO signal to control Dropkiq HF/VHF frequency extension card if installed +3.3Vaux +3.3V supply Ground Epiq Solutions Proprietary Page 21...
  • Page 22 * This indicates a GPIO pin that should preferred for use when interfacing to a custom host platform. These pins will receive priority in terms of GPIO backward compatibility if future variants of Sidekiq require changes to the GPIO allocation. Epiq Solutions Proprietary Page 22...
  • Page 23: Basic Usage In A Host System

    Linux systems as well as ARM-based Linux systems. Kernel versions prior to 3.0 (i.e., 2.6+) may also be supported. Please contact Epiq Solutions for details. For customers interested in doing a custom build of the Sidekiq PCIe device driver for their host platform, a license for the source code for this device driver is also available separately.
  • Page 24: Rf Interfaces

    EXPRESSCARD SLOT Many laptops provide an external Expresscard slot to allow a user to interface peripherals to their host system. Standards-compliant Expresscard slots provide both a x1 PCIe interface as well as a Epiq Solutions Proprietary Page 24...
  • Page 25: Pcie Slot

    Expresscard slots. The Sidekiq PDK laptop ships with an Expresscard-to-MiniPCIe adapter support evaluation. In addition, Epiq Solutions is developing a version of the Expresscard-to-MiniPCIe adapter with a housing around the Sidekiq card, terminating with two SMA ports on the end of the housing. Please contact Epiq Solutions for details of this adapter plus housing.
  • Page 26: Thermal Dissipation

    A properly configured Windows host system (with the necessary device driver loaded) with both PCIe and USB 2.0 will allow the Sidekiq to enumerate on both the PCIe bus as well as the USB bus. Epiq Solutions Proprietary Page 26...
  • Page 27 “lsusb” to confirm the presence of Sidekiq. The execution of “sudo lsusb -v” will provide a verbose listing of all USB devices currently enumerated in the system, with output similar to the following when Sidekiq is detected: Epiq Solutions Proprietary Page 27...
  • Page 28: Internal/External Reference Clock Options

    For cases where a customer would like to switch between internal and external reference clock options, a software application can be provided to update the EEPROM configuration settings. Please contact Epiq Solutions for details. MAXIMUM RF POWER INPUT AT RF INPUT CONNECTOR It is often necessary for the system integrator to understand the maximum RF input signal that can be received by Sidekiq.
  • Page 29: Support For Host System Sleep/Hibernation

    Due to the fact that no host system would typically route these signals to a JTAG header, Epiq Solutions developed a stand-alone JTAG adapter card to provide access to these JTAG signals. In this configuration, Sidekiq that can be used in conjunction with a MiniPCIe extender ribbon cable to connect the MiniPCIe signals to the host system through the MiniPCIe extender card.
  • Page 30 The Sidekiq JTAG board provides several additional interfaces that can be used for testing Sidekiq, such as power consumption measurement and access to the FPGA GPIO signals provided by Sidekiq at the MiniPCIe edge connector. Contact Epiq Solutions for additional details of these features.
  • Page 31 The signal integrity of the MiniPCIe Adapter Card Ribbon Cable has been tested in several different systems without any issues. Longer ribbon cables may also work, though it is up to the end user to verify functionality. Epiq Solutions Proprietary Page 31...
  • Page 32 Sidekiq Mechanical Outline SIDEKIQ MECHANICAL OUTLINE A dimensioned mechanical drawing of Sidekiq is shown below. In addition, a 3D model (in STP format) is also available. Please contact Epiq Solutions for this model. Figure 5: Sidekiq dimensioned drawing Epiq Solutions Proprietary...
  • Page 33 FPGA reference designs are managed through Epiq Solutions’ private web-based support forum* available at epiqsolutions.com/support. *Registration is required to use the Epiq Solutions Customer Support Center. You can register at epiqsolutions.com/support Figure 6: Sidekiq NUC hardware I/O interfaces...
  • Page 34 A user can scan the system for Sidekiq cards, displaying version information for one or all card(s) upon detection by running the version_test application by executing the command: ./version_test The application should return results that look something like the following: Epiq Solutions Proprietary Page 34...
  • Page 35 I/Q pairs with ‘I’ samples stored in the upper 16-bits of each word, and ‘Q’ samples stored in the lower 16-bits of each word. Additional available options are described by executing: ./rx_samples -h ERA - Epiq RF Analyzer Epiq Solutions Proprietary Page 35...
  • Page 36 GPIO depends on the loaded FPGA. The connector is a 2x8 header, 0.1" pin spacing, 0.025" square pins (standard size & spacing), Harwin P/N M20-9740846. Function Function V_SENSE I_SENSE mPCIe pin 20 Epiq Solutions Proprietary Page 36...
  • Page 37 I_SENSE: outputs a voltage proportional to current in volts/amp, i.e., 0.4 V means the Sidekiq card is drawing 400mA. SIDEKIQ NUC JTAG CONNECTOR The JTAG connector is a Samtec P/N STMM-107-02-G-D-RA. It will allow the standard Xilinx 14-pin JTAG cable to be attached. Function Function VREF* Epiq Solutions Proprietary Page 37...
  • Page 38 HW-USB-II-G, can be utilized to access JTAG on the FPGA. Note: the default reference design does not have Chipscope ila instantiated and users will need to create a Chipscope ILA core through the gui ip core generator inside Vivado when building their custom design. Epiq Solutions Proprietary Page 38...
  • Page 39 (part#, serial#). User EEPROM 16 KB and must be returned to factory to configuration settings be cleared. ref_clock setting is (ref_clock). USB controller read/write via the API. firmware Table 15: mPCIe Sidekiq Non-Volatile Memory Epiq Solutions Proprietary Page 39...
  • Page 40 [1] Software control of the reference clock setting via EEPROM setting is supported starting with Revision C of Sidekiq. Previous hardware revisions require a hardware modification to switch between internal and external reference clocks. Please contact Epiq Solutions for details. Epiq Solutions Proprietary...

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