Epiq Solutions Sidekiq NV100 Hardware User Manual
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Epiq Solutions Sidekiq NV100 Hardware User Manual

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Sidekiq™ NV100
RF Transceiver • Low SWaP
HARDWARE USER MANUAL
V1.4 - MAY 25, 2022

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Summary of Contents for Epiq Solutions Sidekiq NV100

  • Page 1 Sidekiq™ NV100 RF Transceiver • Low SWaP HARDWARE USER MANUAL V1.4 - MAY 25, 2022...
  • Page 2 Sidekiq™ NV100 | Hardware User Manual CHANGELOG Revision Date Description Author 2020-10-07 Pre-release draft, initial version Barry L 2021-10-13 First release Barry L 2021-11-11 NUC PDK and JTAG fixture updates Barry L 2022-01-11 Added power consumption numbers Barry L 2022-02-11 Updated jtag fixture, rf port mapping, MTBF, and SoV tables, and format cleanup Barry L 2022-05-25...
  • Page 3 Epiq Solutions is disclosing this document (“Documentation”) as a general guideline for development. Epiq Solutions expressly disclaims any liability arising out of your use of the Documentation. Epiq Solutions reserves the right, at its sole discretion, to change the Documentation without notice at any time. Epiq Solutions assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates.

  • Page 4: Table Of Contents

    ..................29 Proper Detection of Sidekiq NV100 in a Windows Host System .
  • Page 5 ..................42 Sidekiq NV100 JTAG Fixture Thunderbolt3 (TB3) Setup Sidekiq NV100 NUC Platform Development Kit (PDK) .

  • Page 6: Introduction

    RF transceiver, FPGA, RF pre-selection filtering, GPSDO and PCIe interface to a host. This card is similar to the Sidekiq Stretch card developed by Epiq Solutions, but leverages the ADI ADRV9004 RFIC with higher performance 16-bit ADCs and DACs, improved linearity, lower RF frequency tuning, and is capable of supporting two main modes of operation: dual-independently tunable Rx, or Tx+Rx on the same frequency.

  • Page 7: Legal Considerations

    Legal Considerations LEGAL CONSIDERATIONS The Sidekiq NV100 is distributed all over the world. Each country has its own laws governing reception and transmission of radio frequencies. Each user of Sidekiq NV100 and associated software is solely responsible for ensuring that it is used in a manner consistent with the laws of the jurisdiction in which it is used.

  • Page 8: Proper Care And Handling

    ONLY AT THAT TIME. Improper use of the Sidekiq NV100 unit can cause it to become non-functional. In particular, a list of actions that may cause damage to the hardware include the following:...

  • Page 9: Overview

    Sidekiq™ NV100 | Hardware User Manual Overview OVERVIEW This guide provides an overview of the Sidekiq NV100 software defined radio hardware platform, associated capabilities, and basic usage. This includes the following: System level block diagram of the platform Overview of the externally accessible hardware ports...

  • Page 10: References

    Sidekiq™ NV100 | Hardware User Manual References REFERENCES 1. Sidekiq NV100 Product Page https://epiqsolutions.com/rf-transceiver/sidekiq-nv100/ 2. Epiq Solutions Support Page https://support.epiqsolutions.com 3. ADI ADRV9004 Transceiver Product Page http://www.analog.com/en/products/adrv9004.html 4. u-blox ZOE-M8 GNSS SiP module https://www.u-blox.com/en/product/zoe-m8-series 5. Berquist Thermal Gap Pad Material http://www.bergquistcompany.com/thermal_materials/gap-pad.htm...

  • Page 11: Terms And Definitions

    Intermediate Frequency In-Phase / Quadrature Phase JTAG Joint Test Action Group kilohertz Light Emitting Diode megahertz MIMO Multiple Input Multiple Output millisecond Next Unit of Computing NVMe Non-Volatile Memory Platform Development Kit Proportional–Integral–Derivative Pulse Per Second Epiq Solutions Proprietary Page 11...
  • Page 12 Universal Asynchronous Receiver Transmitter U.FL Miniature RF coax connector, manufactured for use as the antenna interface on M.2 cards Universal Serial Bus W.FL Micro-Miniature RF coaxial connector manufactured by Hirose Table 1: Terms and Definitions Epiq Solutions Proprietary Page 12...

  • Page 13: System Overview

    System Overview SYSTEM OVERVIEW Sidekiq NV100 is a miniature software defined radio card in a M.2 2280 card form factor, providing a flexible wideband RF transceiver that can be used by a host system. The M.2 2280 form factor is widely used for PCIe-based NVMe®...
  • Page 14 PCIe Gen 2.0 (5 Gbps) x2 interface to the host platform Support for external 1PPS input signal for sample time alignment across multiple Sidekiq units Weight: 9 grams Power: 4 - 6 W (application dependent) Epiq Solutions Proprietary Page 14...
  • Page 15 Sidekiq™ NV100 | Hardware User Manual System Overview Figure 1: Sidekiq NV100 front side Figure 2: Sidekiq NV100 block diagram Epiq Solutions Proprietary Page 15...

  • Page 16: Hardware Specification

    -18 dBm on (J1) and -25 dBm on (J2), frequency dependent max gain) RF Pre-Selection Sub-octave pre-select filtering for interference protection from 30 MHz to 6 GHz; Filtering automatically selected when tuning the RF receiver. Table 2: RF Receiver Spec Epiq Solutions Proprietary Page 16...

  • Page 17: Rf Transmitter Specification

    0.8 – 3.0 Vpp, +7 dBm max from 50 ohm source for 10 MHz Reference Clock Output Frequency 40 MHz Reference Clock Output Power ~1.3 Vpp into high-Z load or ~635 mVpp into 50 ohm load PPS Input Level 3.3V max. Table 4: Clock Spec Epiq Solutions Proprietary Page 17...

  • Page 18: Hardware Specification

    -30 deg C* to + 85 deg C Component Temperature *Operation down to -40 deg C is supported, though the TCVCXO will operate outside of Rating the +/- 0.1 PPM accuracy specification. Table 5: HW Spec Epiq Solutions Proprietary Page 18...

  • Page 19: Hardware Interfaces

    Sidekiq™ NV100 | Hardware User Manual Hardware Interfaces HARDWARE INTERFACES Sidekiq NV100 provides a variety of different hardware interfaces. Each of these hardware interfaces is shown in the annotated diagram and defined below. Figure 3: Annotated diagram of Sidekiq NV100 hardware I/O interfaces...

  • Page 20: Antenna Port 1 (Rxa1/Rxb1/Txa1)

    Handle RF Port [Fixed-Mode] RF Port [TRX-Mode] skiq_rx_hdl_A1 skiq_rf_port_J1 skiq_rf_port_J1 skiq_tx_hdl_A1 skiq_rf_port_J1 skiq_rf_port_J1 skiq_rx_hdl_B1 skiq_rf_port_J1 or skiq_rf_port_J2 skiq_rf_port_J2 skiq_tx_hdl_B1 skiq_rf_port_J2 skiq_rf_port_J2 Table 6: RF Port Mapping Epiq Solutions Proprietary Page 20...

  • Page 21: Gps Rx

    The External Reference Clock Input interface is a W.FL jack connector (J4) that allows an external 10 or 40 MHz reference clock to be brought into Sidekiq NV100 and utilized instead of the default on-board 40 MHz TCVCXO. The selection between on-board TCVCXO and the external TCVCXO is controlled through the libsidekiq software API.

  • Page 22: Reference Clock Output (Devclk_Out)

    This signal is routed to the on-board FPGA (pin M18) through a 3.3V to 1.8V level shifter. A maximum recommended signal level of 3.3V can be applied to this port. PRIMARY THERMAL RELIEF (RF SHIELD) Epiq Solutions Proprietary Page 22...

  • Page 23: Temperature & Inertial Measurement Unit (Imu) Sensors

    If no air flow is available in the host system where Sidekiq NV100 is being integrated, it is highly recommended that the user provide a thermal dissipation path from this shield to a thermally conductive surface in the host system, such as a metal back plate or other metal housing.

  • Page 24: M.2 Edge Connector

    The M.2 Edge Connector is used to route various signals between the M.2 host system and the Sidekiq card. The Sidekiq NV100 card supports both Key B as well as Key M. A complete table enumerating the pins and their usage is shown in the table below.
  • Page 25 PERP0 PCIe lane 0 host receiver diff pair (data module->host) PERST_N PCIe reset Ground CLKREQ_N Clock Request, pulled low whenever Sidekiq NV100 is powered up REFCLKN PCIe reference clock negative leg of diff pair, from host PEWAKE# Unused (floating) REFCLKP...
  • Page 26 CONFIG_2 Pulled low through resistor to ground Table 10: Sidekiq NV100 edge connector signal descriptions * This indicates a GPIO pin that is preferred for use when interfacing to a custom host platform. These pins will receive priority in terms of GPIO backward compatibility if future variants of Sidekiq require changes to the GPIO allocation.

  • Page 27: Basic Usage In A Host System

    SSDs. USB/PCIE SIGNAL AVAILABILITY IN HOST PLATFORM The Sidekiq NV100 is designed solely with a PCIe interface. USB is not present in standard M.2 2280 SSD slots and not included in the standard edge connector profile. BIOS COMPATIBILITY Different host systems enforce different rules regarding which M.2 cards are considered to be...

  • Page 28: Rf Interfaces

    (2.4 GHz and 5.9 GHz), but it is up to the user to validate the performance of the antenna solution. SYSTEM INTERFACE The Sidekiq NV100 is designed to interface to a host system through insertion into a PCIe-based M.2 2280 key B or M socket, commonly used for NVMe® solid state drives (SSD).

  • Page 29: Proper Detection Of Sidekiq Nv100 In A Windows Host System

    A properly configured Linux host system (with the necessary device drivers loaded) will allow Sidekiq NV100 to enumerate on the PCIe bus. The enumeration on the PCIe bus can be verified by executing the command “lspci” to confirm the presence of Sidekiq. The execution of the “lspci”...

  • Page 30: Power Consumption

    The power consumption of Sidekiq NV100 varies depending on the configuration and application of the card. Nominal tolerance of the 3.3V rail is +/-9%. The table below lists the power consumption with the stock Sidekiq NV100 FPGA reference design (v3.16.0) and libsidekiq v4.17.0 under different operating conditions. The measured card temperature was 57 deg C during testing.

  • Page 31: Gps Power Consumption (Tbd)

    GPS tracking/antenna on Table 12: GPS Power Consumption Note that the antenna bias power requirement is not included in the overall Sidekiq NV100 test results. Power will depend on the particular active antenna used. The (TBD) mA shown above is typical for most modern antennas, but some older antennas may require several times more power.
  • Page 32 Sidekiq NV100 uses components that are rated for operation to +85 deg C, and thus the end user must ensure that the temperature reported by the on-board temperature sensor does not exceed +85 deg C.
  • Page 33 API function. GPS DISCIPLINED OSCILLATOR (GPSDO) Sidekiq NV100 features hardware to support a GPS disciplined oscillator. The key components are the GPS receiver module with a 1 pulse per second (PPS) output and a voltage control oscillator (VCO).
  • Page 34 Basic Usage in a Host System GPSDO PERFORMANCE The GPSDO on Sidekiq NV100 was tested under the following conditions: Ambient temperature was approximately 25 C. The NV100 had a heat sink attached but no airflow was directed at it (natural convection only)
  • Page 35 Sidekiq™ NV100 | Hardware User Manual Basic Usage in a Host System Figure 6: Allan Deviation Epiq Solutions Proprietary Page 35...
  • Page 36 GPS / UART FUNCTIONALITY IN LINUX HOST SYSTEM SIDEKIQ NV100 GPS SYSFS Control and status monitoring of Sidekiq NV100’s on-board GPS is provided through several sysfs entries on the host system. When both the sidekiq_uart.ko kernel module and the dmadriver.ko (v5.3.0 or later) kernel module are loaded, several sysfs entries are available in...
  • Page 37 ==> reset <== SIDEKIQ NV100 GPS UART The Sidekiq NV100’s on-board GPS can provide NMEA-0183 messages through a UART device on the host system. When both the sidekiq_uart.ko kernel module and the dmadriver.ko (v5.3.0 or later) kernel module are loaded, a UART character device file is available as /dev/ttySKIQ_UART<card>...
  • Page 38 For example, if a Sidekiq NV100 card is installed in a laptop with power savings mode enabled each time the laptop lid closes, proper Sidekiq operation is not guaranteed after the laptop lid is reopened.
  • Page 39 DEBUGGING THE SIDEKIQ NV100 JTAG ACCESS ON SIDEKIQ NV100 The Xilinx Artix 7 XC7A50T FPGA utilized on Sidekiq NV100 provides a JTAG interface that can be accessed and utilized during the development of custom logic/processing modules targeting the FPGA. However, due to physical size constraints, there is no space available on Sidekiq NV100 for a standard JTAG interface.
  • Page 40 Sidekiq™ NV100 | Hardware User Manual Basic Usage in a Host System Figure 8: Sidekiq NV100 JTAG Fixture Epiq Solutions Proprietary Page 40...
  • Page 41 GPIO_1 GPIO_2 GPIO_3 GPIO_4 FPGA_PPS GPIO_6 GPIO_8 Table 15: Sidekiq NV100 JTAG Fixture GPIO Header (J8) Description Description VREF (V1.8) PGND HALT (NC) Table 16: Sidekiq NV100 JTAG Fixture Xilinx Header (J1) USB-C / TB3: Thunderbolt 3 over locking USB-C connector, provides both power and data transport...
  • Page 42 System section to verify that the Sidekiq NV100 is seen over PCIe by the host. 8. If Sidekiq NV100 is not seen over PCIe, power everything down and repeat the steps above, if the PCIe interface is still not detected, please contact Epiq Solutions support for further assistance.
  • Page 43 SIDEKIQ NV100 NUC PLATFORM DEVELOPMENT KIT (PDK) SIDEKIQ NV100 NUC PDK OVERVIEW The Sidekiq NV100 NUC PDK includes one Sidekiq NV100 card hosted on an Intel NUC11TNHi5/i7 (or later) Mini PC NUC system. The Sidekiq NV100 NUC PDK is pre-loaded with Epiq Solutions’ libsidekiq API, test applications, ERA (Spectrum Analyzer), and GNU Radio with gr-sidekiq.
  • Page 44 2. Connect an antenna or RF source to the TRx1 SMA connector shown above before using any of the test applications or ERA; for more details, see “Sidekiq NV100 NUC RF Ports” below. 3. Power on the NUC, the computer monitor will indicate that it is starting up Ubuntu Linux and then it will show a login page.
  • Page 45 Sidekiq™ NV100 | Hardware User Manual Sidekiq NV100 NUC Platform Development Kit (PDK) *********************************************************** * Sidekiq Card 0 Card accelerometer present: true part type: NV100 part info: ES035201-C0-00 serial: XXXX xport: PCIe GPSDO: available and present FPGA version: 3.16.0 git hash: 0x00217183...
  • Page 46 The GPIO connector provides access to monitoring the power supply voltage and current to the M.2 socket as well as providing access to lines used for digital I/O on the Sidekiq NV100. The ability to use a pin as GPIO depends on the loaded FPGA. The connector is a 2x8 header, 0.1" pin spacing, 0.025"...
  • Page 47 VREF* is a 1.8V output and establishes the required I/O voltage level for the JTAG adapter. ACCESSING SIDEKIQ NV100 NUC JTAG CONNECTOR For customers adding their own custom FPGA blocks in the “user_app” area of the Sidekiq NV100 reference design, it can often be useful to access JTAG to monitor signals in the FPGA through Xilinx's Chipscope software.
  • Page 48 $ echo 1 | sudo tee /sys/bus/pci/devices/0000:0a:00.0/remove '0000:0a:00.0' will change depending on where on the PCI bus NV100 is located 4. Program the FPGA using Vivado using an older Sidekiq NV100 bitstream such as (or later) from Sidekiq SDK v4.17.0 (or later) located sidekiq_image_nv100_xport_pcie_3.16.0.bin...
  • Page 49 Sidekiq™ NV100 | Hardware User Manual Sidekiq NV100 NUC Platform Development Kit (PDK) Rescan the PCI bus to enumerate Sidekiq NV100 $ echo 1 | sudo tee /sys/bus/pci/rescan $ lspci -d 19aa: 0a:00.0 Signal processing controller: Device 19aa:2280 (rev 04) 6.
  • Page 50 A dimensioned mechanical drawing of Sidekiq NV100 is shown in the dimensioned drawing below. In addition, a 3D model (in STP format) is also available. Please contact Epiq Solutions for this model. Figure 11: Sidekiq NV100 dimensioned drawing Epiq Solutions Proprietary...
  • Page 51 Sidekiq™ NV100 | Hardware User Manual Sidekiq NV100 RF Front End SIDEKIQ NV100 RF FRONT END Figure 12: Sidekiq NV100 RF Front End Block Diagram Note: The appropriate path through the filter banks is selected automatically based on the tune frequency.
  • Page 52 On-Chip XC7A50T FPGA 600 Kb Application usage Power-off DRAM RFIC ARM memory and configuration On-Chip ADRV9004 RFIC unknown Power-off space Table 22: Sidekiq NV100 Volatile Memory Memory Memory User Removable Purpose Process to Clear Type Size Modifiable Cleared with Linux...
  • Page 53 Predicted Failure Rate and MTBF PREDICTED FAILURE RATE AND MTBF Listed below is the Failure Rate and MTBF for the ES035-201-B1 Sidekiq NV100 Assembly. The calculations are derived from Relyence Reliability Software and based off a fixed/ground/controlled operating environment with an ambient temperature of 25°C.

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